Searched refs:CORE_MOD (Results 1 – 12 of 12) sorted by relevance
/linux-6.6.21/arch/arm/mach-omap2/ |
D | omap_hwmod_2xxx_ipblock_data.c | 198 .module_offs = CORE_MOD, 213 .module_offs = CORE_MOD, 228 .module_offs = CORE_MOD, 243 .module_offs = CORE_MOD, 258 .module_offs = CORE_MOD, 273 .module_offs = CORE_MOD, 288 .module_offs = CORE_MOD, 303 .module_offs = CORE_MOD, 318 .module_offs = CORE_MOD, 333 .module_offs = CORE_MOD, [all …]
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D | omap_hwmod_2430_data.c | 85 .module_offs = CORE_MOD, 100 .module_offs = CORE_MOD, 115 .module_offs = CORE_MOD, 130 .module_offs = CORE_MOD, 143 .module_offs = CORE_MOD, 175 .module_offs = CORE_MOD, 219 .module_offs = CORE_MOD, 235 .module_offs = CORE_MOD, 251 .module_offs = CORE_MOD, 267 .module_offs = CORE_MOD, [all …]
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D | cm3xxx.c | 422 omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); in omap3_cm_save_context() 424 omap2_cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3); in omap3_cm_save_context() 438 omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN1); in omap3_cm_save_context() 440 omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN2); in omap3_cm_save_context() 442 omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN3); in omap3_cm_save_context() 464 omap2_cm_read_mod_reg(CORE_MOD, OMAP2_CM_CLKSTCTRL); in omap3_cm_save_context() 479 omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE1); in omap3_cm_save_context() 481 omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE2); in omap3_cm_save_context() 483 omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE3); in omap3_cm_save_context() 552 omap2_cm_write_mod_reg(cm_context.core_cm_fclken1, CORE_MOD, in omap3_cm_restore_context() [all …]
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D | omap_hwmod_2420_data.c | 98 .module_offs = CORE_MOD, 118 .module_offs = CORE_MOD, 134 .module_offs = CORE_MOD, 162 .module_offs = CORE_MOD, 178 .module_offs = CORE_MOD, 208 .module_offs = CORE_MOD, 222 .module_offs = CORE_MOD,
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D | cm2xxx.c | 231 f1 = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); in omap2xxx_cm_fclks_active() 232 f2 = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2); in omap2xxx_cm_fclks_active() 242 l = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); in omap2xxx_cm_mpu_retention_allowed() 248 l = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2); in omap2xxx_cm_mpu_retention_allowed() 277 tmp = omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) & in omap2xxx_cm_set_mod_dividers() 279 omap2_cm_write_mod_reg(core | tmp, CORE_MOD, CM_CLKSEL1); in omap2xxx_cm_set_mod_dividers()
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D | omap_hwmod_3xxx_data.c | 260 .module_offs = CORE_MOD, 275 .module_offs = CORE_MOD, 346 .module_offs = CORE_MOD, 361 .module_offs = CORE_MOD, 423 .module_offs = CORE_MOD, 602 .module_offs = CORE_MOD, 617 .module_offs = CORE_MOD, 632 .module_offs = CORE_MOD, 826 .module_offs = CORE_MOD, 890 .module_offs = CORE_MOD, [all …]
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D | prm3xxx.c | 277 CORE_MOD, OMAP2_RM_RSTCTRL); in omap3_prm_reset_modem() 278 omap2_prm_write_mod_reg(0, CORE_MOD, OMAP2_RM_RSTCTRL); in omap3_prm_reset_modem() 354 omap2_prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1); in omap3_prm_init_pm() 355 omap2_prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3); in omap3_prm_init_pm() 362 omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP2_RM_RSTST); in omap3_prm_init_pm()
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D | powerdomains3xxx_data.c | 97 .prcm_offs = CORE_MOD, 114 .prcm_offs = CORE_MOD, 136 .prcm_offs = CORE_MOD,
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D | powerdomains2xxx_data.c | 58 .prcm_offs = CORE_MOD,
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D | pm34xx.c | 147 c += omap_prm_clear_mod_irqs(CORE_MOD, 1, ~0); in _prcm_int_handle_wakeup() 150 c += omap_prm_clear_mod_irqs(CORE_MOD, 3, ~0); in _prcm_int_handle_wakeup()
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D | prcm-common.h | 24 #define CORE_MOD 0x200 macro
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D | sleep34xx.S | 29 #define PM_PREPWSTST_CORE_P OMAP3430_PRM_BASE + CORE_MOD +\ 32 #define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1)
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