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Searched refs:CORE_CLK_SRC_DPLL_X2 (Results 1 – 4 of 4) sorted by relevance

/linux-6.6.21/arch/arm/mach-omap2/
Dclkt2xxx_dpllcore.c124 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); in omap2_reprogram_dpllcore()
147 tmpset.cm_clksel2_pll |= CORE_CLK_SRC_DPLL_X2; in omap2_reprogram_dpllcore()
149 done_rate = CORE_CLK_SRC_DPLL_X2; in omap2_reprogram_dpllcore()
165 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); in omap2_reprogram_dpllcore()
Dclkt2xxx_virt_prcm_set.c130 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); in omap2_select_table_rate()
138 CORE_CLK_SRC_DPLL_X2) in omap2_select_table_rate()
139 done_rate = CORE_CLK_SRC_DPLL_X2; in omap2_select_table_rate()
150 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); in omap2_select_table_rate()
Dsdrc2xxx.c38 static u32 curr_perf_level = CORE_CLK_SRC_DPLL_X2;
88 else if (level == CORE_CLK_SRC_DPLL_X2) in omap2xxx_sdrc_reprogram()
Dclock.h46 #define CORE_CLK_SRC_DPLL_X2 0x2 macro