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Searched refs:CLK_TOP_USB30_SEL (Results 1 – 11 of 11) sorted by relevance

/linux-6.6.21/Documentation/devicetree/bindings/usb/
Dmediatek,mtu3.yaml242 clocks = <&topckgen CLK_TOP_USB30_SEL>;
260 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
278 clocks = <&topckgen CLK_TOP_USB30_SEL>;
292 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
Dmediatek,mtk-xhci.yaml205 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
/linux-6.6.21/include/dt-bindings/clock/
Dmediatek,mt6795-clk.h102 #define CLK_TOP_USB30_SEL 91 macro
Dmt8173-clk.h104 #define CLK_TOP_USB30_SEL 94 macro
Dmt2712-clk.h141 #define CLK_TOP_USB30_SEL 110 macro
/linux-6.6.21/drivers/clk/mediatek/
Dclk-mt6795-topckgen.c470 TOP_MUX_GATE(CLK_TOP_USB30_SEL, "usb30_sel", usb30_parents, 0x70, 0, 2, 7, 0),
Dclk-mt8173-topckgen.c549 MUX_GATE(CLK_TOP_USB30_SEL, "usb30_sel", usb30_parents, 0x0070, 0, 2, 7),
Dclk-mt2712.c660 MUX_GATE(CLK_TOP_USB30_SEL, "usb30_sel", usb30_parents, 0x070, 0, 2, 7),
/linux-6.6.21/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi805 clocks = <&topckgen CLK_TOP_USB30_SEL>;
820 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
869 clocks = <&topckgen CLK_TOP_USB30_SEL>;
884 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
Dmt8173.dtsi933 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
948 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
/linux-6.6.21/Documentation/devicetree/bindings/phy/
Dmediatek,tphy.yaml282 clocks = <&topckgen CLK_TOP_USB30_SEL>;