Searched refs:CLK_TOP_UNIVPLL_D5_D4 (Results 1 – 14 of 14) sorted by relevance
/linux-6.6.21/include/dt-bindings/clock/ |
D | mt8183-clk.h | 106 #define CLK_TOP_UNIVPLL_D5_D4 70 macro
|
D | mt8186-clk.h | 111 #define CLK_TOP_UNIVPLL_D5_D4 92 macro
|
D | mt6779-clk.h | 81 #define CLK_TOP_UNIVPLL_D5_D4 71 macro
|
D | mt8192-clk.h | 105 #define CLK_TOP_UNIVPLL_D5_D4 93 macro
|
D | mediatek,mt8188-clk.h | 129 #define CLK_TOP_UNIVPLL_D5_D4 118 macro
|
D | mt8195-clk.h | 162 #define CLK_TOP_UNIVPLL_D5_D4 150 macro
|
/linux-6.6.21/drivers/clk/mediatek/ |
D | clk-mt8186-topckgen.c | 46 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4, 0),
|
D | clk-mt8183.c | 62 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4, 0),
|
D | clk-mt8188-topckgen.c | 53 FACTOR(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4),
|
D | clk-mt8192.c | 51 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4, 0),
|
D | clk-mt8195-topckgen.c | 64 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4, 0),
|
D | clk-mt6779.c | 55 FACTOR(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4),
|
/linux-6.6.21/arch/arm64/boot/dts/mediatek/ |
D | mt8195.dtsi | 1349 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>, 1350 <&topckgen CLK_TOP_UNIVPLL_D5_D4>; 1427 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>, 1428 <&topckgen CLK_TOP_UNIVPLL_D5_D4>; 1451 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>, 1452 <&topckgen CLK_TOP_UNIVPLL_D5_D4>; 1475 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>, 1476 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
|
D | mt8192.dtsi | 924 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>, 925 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
|