| /linux-6.6.21/include/dt-bindings/clock/ |
| D | mt8135-clk.h | 53 #define CLK_TOP_UNIVPLL_D5 42 macro
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| D | mt7629-clk.h | 58 #define CLK_TOP_UNIVPLL_D5 48 macro
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| D | mt8516-clk.h | 59 #define CLK_TOP_UNIVPLL_D5 27 macro
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| D | mt7622-clk.h | 52 #define CLK_TOP_UNIVPLL_D5 40 macro
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| D | mediatek,mt6795-clk.h | 78 #define CLK_TOP_UNIVPLL_D5 67 macro
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| D | mt6797-clk.h | 75 #define CLK_TOP_UNIVPLL_D5 65 macro
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| D | mt8173-clk.h | 80 #define CLK_TOP_UNIVPLL_D5 70 macro
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| D | mt6765-clk.h | 65 #define CLK_TOP_UNIVPLL_D5 30 macro
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| D | mediatek,mt8365-clk.h | 40 #define CLK_TOP_UNIVPLL_D5 30 macro
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| D | mt8183-clk.h | 97 #define CLK_TOP_UNIVPLL_D5 61 macro
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| D | mt8186-clk.h | 109 #define CLK_TOP_UNIVPLL_D5 90 macro
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| D | mt6779-clk.h | 72 #define CLK_TOP_UNIVPLL_D5 62 macro
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| D | mt2712-clk.h | 64 #define CLK_TOP_UNIVPLL_D5 33 macro
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| D | mt2701-clk.h | 30 #define CLK_TOP_UNIVPLL_D5 20 macro
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| D | mt8192-clk.h | 103 #define CLK_TOP_UNIVPLL_D5 91 macro
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| D | mediatek,mt8188-clk.h | 127 #define CLK_TOP_UNIVPLL_D5 116 macro
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| D | mt8195-clk.h | 160 #define CLK_TOP_UNIVPLL_D5 148 macro
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| /linux-6.6.21/drivers/clk/mediatek/ |
| D | clk-mt6795-topckgen.c | 434 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5, "univpll_d5", "univ_249p6m", 1, 1, 0),
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| D | clk-mt8173-topckgen.c | 513 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5, "univpll_d5", "univ_249p6m", 1, 1, 0),
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| D | clk-mt8186-topckgen.c | 44 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5, "univpll_d5", "univpll", 1, 5, 0),
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| D | clk-mt7622.c | 294 FACTOR(CLK_TOP_UNIVPLL_D5, "univpll_d5", "univpll", 1, 5),
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| D | clk-mt8135.c | 75 FACTOR(CLK_TOP_UNIVPLL_D5, "univpll_d5", "univpll_249p6m", 1, 1),
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| D | clk-mt8516.c | 54 FACTOR(CLK_TOP_UNIVPLL_D5, "univpll_d5", "univpll", 1, 5),
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| D | clk-mt7629.c | 401 FACTOR(CLK_TOP_UNIVPLL_D5, "univpll_d5", "univpll", 1, 5),
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| D | clk-mt8167.c | 57 FACTOR(CLK_TOP_UNIVPLL_D5, "univpll_d5", "univpll", 1, 5),
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