| /linux-6.6.21/include/dt-bindings/clock/ |
| D | mt8135-clk.h | 31 #define CLK_TOP_SYSPLL_D2 20 macro
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| D | mt7629-clk.h | 34 #define CLK_TOP_SYSPLL_D2 24 macro
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| D | mt7622-clk.h | 30 #define CLK_TOP_SYSPLL_D2 18 macro
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| D | mediatek,mt6795-clk.h | 51 #define CLK_TOP_SYSPLL_D2 40 macro
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| D | mt6797-clk.h | 46 #define CLK_TOP_SYSPLL_D2 36 macro
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| D | mt8173-clk.h | 53 #define CLK_TOP_SYSPLL_D2 43 macro
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| D | mt6765-clk.h | 36 #define CLK_TOP_SYSPLL_D2 1 macro
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| D | mediatek,mt8365-clk.h | 16 #define CLK_TOP_SYSPLL_D2 6 macro
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| D | mt8183-clk.h | 79 #define CLK_TOP_SYSPLL_D2 43 macro
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| D | mt2712-clk.h | 36 #define CLK_TOP_SYSPLL_D2 5 macro
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| D | mt2701-clk.h | 12 #define CLK_TOP_SYSPLL_D2 2 macro
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| /linux-6.6.21/drivers/clk/mediatek/ |
| D | clk-mt6795-topckgen.c | 405 FACTOR_FLAGS(CLK_TOP_SYSPLL_D2, "syspll_d2", "main_h546m", 1, 1, 0),
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| D | clk-mt8173-topckgen.c | 484 FACTOR_FLAGS(CLK_TOP_SYSPLL_D2, "syspll_d2", "main_h546m", 1, 1, 0),
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| D | clk-mt7622.c | 272 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
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| D | clk-mt8135.c | 47 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll_806m", 1, 1),
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| D | clk-mt7629.c | 377 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
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| D | clk-mt6797.c | 26 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
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| D | clk-mt2712.c | 44 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "syspll_ck", 1, 2),
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| D | clk-mt8183.c | 36 FACTOR_FLAGS(CLK_TOP_SYSPLL_D2, "syspll_d2", "syspll_ck", 1, 2, 0),
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| D | clk-mt8365.c | 35 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
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| D | clk-mt6765.c | 84 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
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| D | clk-mt2701.c | 58 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
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