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Searched refs:CLK_TOP_SENINF2_SEL (Results 1 – 2 of 2) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Dmt8192-clk.h51 #define CLK_TOP_SENINF2_SEL 39 macro
/linux-6.6.21/drivers/clk/mediatek/
Dclk-mt8192.c640 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF2_SEL, "seninf2_sel",