Home
last modified time | relevance | path

Searched refs:CLK_TOP_SENINF1 (Results 1 – 9 of 9) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Dmt8186-clk.h49 #define CLK_TOP_SENINF1 30 macro
Dmt6779-clk.h149 #define CLK_TOP_SENINF1 139 macro
Dmediatek,mt8188-clk.h60 #define CLK_TOP_SENINF1 49 macro
Dmt8195-clk.h66 #define CLK_TOP_SENINF1 54 macro
/linux-6.6.21/drivers/clk/mediatek/
Dclk-mt8186-topckgen.c584 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "top_seninf1",
Dclk-mt8188-topckgen.c1070 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "top_seninf1",
Dclk-mt8195-topckgen.c994 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "top_seninf1",
Dclk-mt6779.c734 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "seninf1_sel",
/linux-6.6.21/arch/arm64/boot/dts/mediatek/
Dmt8186.dtsi926 <&topckgen CLK_TOP_SENINF1>;
1002 <&topckgen CLK_TOP_SENINF1>,