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Searched refs:CLK_TOP_MSDCPLL (Results 1 – 15 of 15) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Dmediatek,mt6795-clk.h45 #define CLK_TOP_MSDCPLL 34 macro
Dmt8173-clk.h47 #define CLK_TOP_MSDCPLL 37 macro
Dmt6765-clk.h74 #define CLK_TOP_MSDCPLL 39 macro
Dmediatek,mt8365-clk.h63 #define CLK_TOP_MSDCPLL 53 macro
Dmt2712-clk.h110 #define CLK_TOP_MSDCPLL 79 macro
Dmt2701-clk.h47 #define CLK_TOP_MSDCPLL 37 macro
Dmt8192-clk.h136 #define CLK_TOP_MSDCPLL 124 macro
/linux-6.6.21/drivers/clk/mediatek/
Dclk-mt6795-topckgen.c398 FACTOR(CLK_TOP_MSDCPLL, "msdcpll_ck", "msdcpll", 1, 1),
Dclk-mt8173-topckgen.c477 FACTOR(CLK_TOP_MSDCPLL, "msdcpll_ck", "msdcpll", 1, 1),
Dclk-mt2712.c117 FACTOR(CLK_TOP_MSDCPLL, "msdcpll_ck", "msdcpll", 1, 1),
Dclk-mt8365.c84 FACTOR(CLK_TOP_MSDCPLL, "msdcpll_ck", "msdcpll", 1, 1),
Dclk-mt8192.c82 FACTOR(CLK_TOP_MSDCPLL, "msdcpll_ck", "msdcpll", 1, 1),
Dclk-mt6765.c124 FACTOR(CLK_TOP_MSDCPLL, "msdcpll_ck", "msdcpll", 1, 1),
Dclk-mt2701.c96 FACTOR(CLK_TOP_MSDCPLL, "msdcpll_ck", "msdcpll", 1, 1),
/linux-6.6.21/arch/arm64/boot/dts/mediatek/
Dmt8365-evk.dts142 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL>;