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Searched refs:CLK_TOP_MAINPLL_D7_D2 (Results 1 – 14 of 14) sorted by relevance

/linux-6.6.21/sound/soc/sof/mediatek/mt8195/
Dmt8195-clk.c20 [CLK_TOP_MAINPLL_D7_D2] = "mainpll_d7_d2",
51 ret = clk_prepare_enable(priv->clk[CLK_TOP_MAINPLL_D7_D2]); in adsp_enable_all_clock()
95 clk_disable_unprepare(priv->clk[CLK_TOP_MAINPLL_D7_D2]); in adsp_enable_all_clock()
108 clk_disable_unprepare(priv->clk[CLK_TOP_MAINPLL_D7_D2]); in adsp_disable_all_clock()
128 priv->clk[CLK_TOP_MAINPLL_D7_D2]); in adsp_default_clk_init()
Dmt8195-clk.h19 CLK_TOP_MAINPLL_D7_D2, enumerator
/linux-6.6.21/Documentation/devicetree/bindings/dsp/
Dmediatek,mt8195-dsp.yaml91 <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2
/linux-6.6.21/include/dt-bindings/clock/
Dmt8186-clk.h98 #define CLK_TOP_MAINPLL_D7_D2 79 macro
Dmt6779-clk.h67 #define CLK_TOP_MAINPLL_D7_D2 57 macro
Dmt8192-clk.h95 #define CLK_TOP_MAINPLL_D7_D2 83 macro
Dmediatek,mt8188-clk.h117 #define CLK_TOP_MAINPLL_D7_D2 106 macro
Dmt8195-clk.h150 #define CLK_TOP_MAINPLL_D7_D2 138 macro
/linux-6.6.21/drivers/clk/mediatek/
Dclk-mt8186-topckgen.c33 FACTOR_FLAGS(CLK_TOP_MAINPLL_D7_D2, "mainpll_d7_d2", "mainpll_d7", 1, 2, 0),
Dclk-mt8188-topckgen.c41 FACTOR(CLK_TOP_MAINPLL_D7_D2, "mainpll_d7_d2", "mainpll_d7", 1, 2),
Dclk-mt8192.c41 FACTOR_FLAGS(CLK_TOP_MAINPLL_D7_D2, "mainpll_d7_d2", "mainpll_d7", 1, 2, 0),
Dclk-mt8195-topckgen.c52 FACTOR_FLAGS(CLK_TOP_MAINPLL_D7_D2, "mainpll_d7_d2", "mainpll_d7", 1, 2, 0),
Dclk-mt6779.c41 FACTOR(CLK_TOP_MAINPLL_D7_D2, "mainpll_d7_d2", "mainpll_d7", 1, 2),
/linux-6.6.21/arch/arm64/boot/dts/mediatek/
Dmt8195.dtsi952 <&topckgen CLK_TOP_MAINPLL_D7_D2>,