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Searched refs:CLK_TOP_DISP_SEL (Results 1 – 5 of 5) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Dmt8135-clk.h80 #define CLK_TOP_DISP_SEL 69 macro
Dmt8192-clk.h16 #define CLK_TOP_DISP_SEL 4 macro
/linux-6.6.21/drivers/clk/mediatek/
Dclk-mt8135.c364 MUX_GATE(CLK_TOP_DISP_SEL, "disp_sel", disp_parents, 0x0144, 24, 3, 31),
Dclk-mt8192.c560 MUX_GATE_CLR_SET_UPD(CLK_TOP_DISP_SEL, "disp_sel",
/linux-6.6.21/arch/arm64/boot/dts/mediatek/
Dmt8192.dtsi562 clocks = <&topckgen CLK_TOP_DISP_SEL>,