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Searched refs:CLK_TOP_CAMTG3_SEL (Results 1 – 4 of 4) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Dmt6765-clk.h140 #define CLK_TOP_CAMTG3_SEL 105 macro
Dmt8192-clk.h29 #define CLK_TOP_CAMTG3_SEL 17 macro
/linux-6.6.21/drivers/clk/mediatek/
Dclk-mt8192.c589 MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG3_SEL, "camtg3_sel",
Dclk-mt6765.c399 MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG3_SEL, "camtg3_sel", camtg_parents,