Searched refs:CLK_TOP_AUD_ENGEN2_SEL (Results 1 – 8 of 8) sorted by relevance
| /linux-6.6.21/include/dt-bindings/clock/ |
| D | mt8516-clk.h | 179 #define CLK_TOP_AUD_ENGEN2_SEL 147 macro
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| D | mediatek,mt8365-clk.h | 91 #define CLK_TOP_AUD_ENGEN2_SEL 81 macro
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| D | mt8192-clk.h | 56 #define CLK_TOP_AUD_ENGEN2_SEL 44 macro
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| /linux-6.6.21/drivers/clk/mediatek/ |
| D | clk-mt8516.c | 401 MUX(CLK_TOP_AUD_ENGEN2_SEL, "aud_engen2_sel", aud_engen2_parents,
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| D | clk-mt8167.c | 590 MUX(CLK_TOP_AUD_ENGEN2_SEL, "aud_engen2_sel", aud_engen2_parents,
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| D | clk-mt8365.c | 465 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_ENGEN2_SEL, "aud_engen2_sel",
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| D | clk-mt8192.c | 651 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_ENGEN2_SEL, "aud_engen2_sel",
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| /linux-6.6.21/arch/arm64/boot/dts/mediatek/ |
| D | mt8192.dtsi | 983 <&topckgen CLK_TOP_AUD_ENGEN2_SEL>,
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