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Searched refs:CLK_TOP_AUDIO_SEL (Results 1 – 22 of 22) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Dmt8135-clk.h91 #define CLK_TOP_AUDIO_SEL 80 macro
Dmt7629-clk.h99 #define CLK_TOP_AUDIO_SEL 89 macro
Dmt7622-clk.h90 #define CLK_TOP_AUDIO_SEL 78 macro
Dmediatek,mt6795-clk.h108 #define CLK_TOP_AUDIO_SEL 97 macro
Dmt8173-clk.h110 #define CLK_TOP_AUDIO_SEL 100 macro
Dmt6765-clk.h146 #define CLK_TOP_AUDIO_SEL 111 macro
Dmediatek,mt8365-clk.h86 #define CLK_TOP_AUDIO_SEL 76 macro
Dmt2712-clk.h147 #define CLK_TOP_AUDIO_SEL 116 macro
Dmt2701-clk.h100 #define CLK_TOP_AUDIO_SEL 89 macro
Dmt8192-clk.h39 #define CLK_TOP_AUDIO_SEL 27 macro
/linux-6.6.21/drivers/clk/mediatek/
Dclk-mt6795-topckgen.c478 TOP_MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents, 0x80, 16, 2, 23, 0),
Dclk-mt8173-topckgen.c561 MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents,
Dclk-mt7622.c440 MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents,
Dclk-mt8135.c379 MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents, 0x0158, 24, 2, 31),
Dclk-mt7629.c498 MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents,
Dclk-mt2712.c672 MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents,
Dclk-mt8365.c449 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents,
Dclk-mt8192.c612 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUDIO_SEL, "audio_sel",
Dclk-mt6765.c418 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents,
Dclk-mt2701.c518 MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", msdc30_parents,
/linux-6.6.21/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi858 <&topckgen CLK_TOP_AUDIO_SEL>,
Dmt8192.dtsi974 <&topckgen CLK_TOP_AUDIO_SEL>,