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Searched refs:CLK_MM_MDP_TDSHP4 (Results 1 – 2 of 2) sorted by relevance

/linux-6.6.21/drivers/clk/mediatek/
Dclk-mt8192-mm.c63 GATE_MM0(CLK_MM_MDP_TDSHP4, "mm_mdp_tdshp4", "disp_sel", 20),
/linux-6.6.21/include/dt-bindings/clock/
Dmt8192-clk.h444 #define CLK_MM_MDP_TDSHP4 20 macro