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Searched refs:CLK_MM_DISP_DITHER0 (Results 1 – 14 of 14) sorted by relevance

/linux-6.6.21/drivers/clk/mediatek/
Dclk-mt6765-mm.c42 GATE_MM(CLK_MM_DISP_DITHER0, "mm_disp_dither0", "mm_ck", 16),
Dclk-mt8186-mm.c47 GATE_MM0(CLK_MM_DISP_DITHER0, "mm_disp_dither0", "top_disp", 16),
Dclk-mt6779-mm.c66 GATE_MM0(CLK_MM_DISP_DITHER0, "mm_disp_dither0", "mm_sel", 30),
Dclk-mt8183-mm.c66 GATE_MM0(CLK_MM_DISP_DITHER0, "mm_disp_dither0", "mm_sel", 30),
Dclk-mt8192-mm.c53 GATE_MM0(CLK_MM_DISP_DITHER0, "mm_disp_dither0", "disp_sel", 10),
/linux-6.6.21/include/dt-bindings/clock/
Dmt6765-clk.h267 #define CLK_MM_DISP_DITHER0 16 macro
Dmt8183-clk.h338 #define CLK_MM_DISP_DITHER0 29 macro
Dmt8186-clk.h315 #define CLK_MM_DISP_DITHER0 14 macro
Dmt6779-clk.h370 #define CLK_MM_DISP_DITHER0 30 macro
Dmt8192-clk.h434 #define CLK_MM_DISP_DITHER0 10 macro
/linux-6.6.21/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,dither.yaml83 clocks = <&mmsys CLK_MM_DISP_DITHER0>;
/linux-6.6.21/arch/arm64/boot/dts/mediatek/
Dmt8192.dtsi1539 clocks = <&mmsys CLK_MM_DISP_DITHER0>;
Dmt8186.dtsi1862 clocks = <&mmsys CLK_MM_DISP_DITHER0>;
Dmt8183.dtsi1813 clocks = <&mmsys CLK_MM_DISP_DITHER0>;