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Searched refs:CLK_BDP_WR_CHANNEL_DI_B (Results 1 – 2 of 2) sorted by relevance

/linux-6.6.21/drivers/clk/mediatek/
Dclk-mt2712-bdp.c43 GATE_BDP(CLK_BDP_WR_CHANNEL_DI_B, "bdp_di_b", "mm_sel", 21),
/linux-6.6.21/include/dt-bindings/clock/
Dmt2712-clk.h396 #define CLK_BDP_WR_CHANNEL_DI_B 18 macro