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Searched refs:CLK_APMIXED_ARMPLL (Results 1 – 17 of 17) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Dmt7986-clk.h12 #define CLK_APMIXED_ARMPLL 0 macro
Dmt7629-clk.h155 #define CLK_APMIXED_ARMPLL 0 macro
Dmediatek,mt7981-clk.h188 #define CLK_APMIXED_ARMPLL 0 macro
Dmt8516-clk.h13 #define CLK_APMIXED_ARMPLL 0 macro
Dmt7622-clk.h170 #define CLK_APMIXED_ARMPLL 0 macro
Dmt6765-clk.h11 #define CLK_APMIXED_ARMPLL 1 macro
Dmediatek,mt8365-clk.h231 #define CLK_APMIXED_ARMPLL 0 macro
Dmt2701-clk.h175 #define CLK_APMIXED_ARMPLL 1 macro
/linux-6.6.21/drivers/clk/mediatek/
Dclk-mt7986-apmixed.c43 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0x0, PLL_AO, 32,
Dclk-mt7981-apmixed.c45 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0x00000001, PLL_AO,
Dclk-mt8516-apmixedsys.c60 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0100, 0x0110, 0, 0,
Dclk-mt8167-apmixedsys.c59 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0100, 0x0110, 0, 0,
Dclk-mt7622-apmixedsys.c59 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0,
Dclk-mt7629.c313 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0,
643 clk_prepare_enable(clk_data->hws[CLK_APMIXED_ARMPLL]->clk); in mtk_apmixedsys_init()
Dclk-mt8365-apmixedsys.c83 PLL_B(CLK_APMIXED_ARMPLL, "armpll", 0x030C, 0x0318, 0x00000001, PLL_AO,
Dclk-mt6765.c707 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x020C, 0x0218, 0,
Dclk-mt2701.c940 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x200, 0x20c, 0x80000000,