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Searched refs:CLKID_VCLK_DIV4 (Results 1 – 8 of 8) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Daxg-clkc.h134 #define CLKID_VCLK_DIV4 124 macro
Dgxbb-clkc.h195 #define CLKID_VCLK_DIV4 187 macro
Dmeson8b-clkc.h151 #define CLKID_VCLK_DIV4 144 macro
Dg12a-clkc.h161 #define CLKID_VCLK_DIV4 150 macro
/linux-6.6.21/drivers/clk/meson/
Dmeson8b.c2921 [CLKID_VCLK_DIV4] = &meson8b_vclk_div4_div_gate.hw,
3125 [CLKID_VCLK_DIV4] = &meson8b_vclk_div4_div_gate.hw,
3340 [CLKID_VCLK_DIV4] = &meson8b_vclk_div4_div_gate.hw,
Dgxbb.c2914 [CLKID_VCLK_DIV4] = &gxbb_vclk_div4.hw,
3121 [CLKID_VCLK_DIV4] = &gxbb_vclk_div4.hw,
Dg12a.c4401 [CLKID_VCLK_DIV4] = &g12a_vclk_div4.hw,
4626 [CLKID_VCLK_DIV4] = &g12a_vclk_div4.hw,
4886 [CLKID_VCLK_DIV4] = &g12a_vclk_div4.hw,
Daxg.c2019 [CLKID_VCLK_DIV4] = &axg_vclk_div4.hw,