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Searched refs:CLKID_MPLL2_DIV (Results 1 – 8 of 8) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Daxg-clkc.h78 #define CLKID_MPLL2_DIV 67 macro
Dgxbb-clkc.h152 #define CLKID_MPLL2_DIV 144 macro
Dmeson8b-clkc.h105 #define CLKID_MPLL2_DIV 98 macro
Dg12a-clkc.h82 #define CLKID_MPLL2_DIV 71 macro
/linux-6.6.21/drivers/clk/meson/
Dmeson8b.c2874 [CLKID_MPLL2_DIV] = &meson8b_mpll2_div.hw,
3078 [CLKID_MPLL2_DIV] = &meson8b_mpll2_div.hw,
3293 [CLKID_MPLL2_DIV] = &meson8b_mpll2_div.hw,
Dgxbb.c2877 [CLKID_MPLL2_DIV] = &gxbb_mpll2_div.hw,
3084 [CLKID_MPLL2_DIV] = &gxbb_mpll2_div.hw,
Dg12a.c4322 [CLKID_MPLL2_DIV] = &g12a_mpll2_div.hw,
4547 [CLKID_MPLL2_DIV] = &g12a_mpll2_div.hw,
4807 [CLKID_MPLL2_DIV] = &g12a_mpll2_div.hw,
Daxg.c1963 [CLKID_MPLL2_DIV] = &axg_mpll2_div.hw,