Searched refs:AMDGPU_MAX_MES_PIPES (Results 1 – 3 of 3) sorted by relevance
61 AMDGPU_MAX_MES_PIPES = 2, enumerator88 const struct firmware *fw[AMDGPU_MAX_MES_PIPES];91 struct amdgpu_bo *ucode_fw_obj[AMDGPU_MAX_MES_PIPES];92 uint64_t ucode_fw_gpu_addr[AMDGPU_MAX_MES_PIPES];93 uint32_t *ucode_fw_ptr[AMDGPU_MAX_MES_PIPES];94 uint64_t uc_start_addr[AMDGPU_MAX_MES_PIPES];97 struct amdgpu_bo *data_fw_obj[AMDGPU_MAX_MES_PIPES];98 uint64_t data_fw_gpu_addr[AMDGPU_MAX_MES_PIPES];99 uint32_t *data_fw_ptr[AMDGPU_MAX_MES_PIPES];100 uint64_t data_start_addr[AMDGPU_MAX_MES_PIPES];[all …]
472 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) { in mes_v10_1_enable()934 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) { in mes_v10_1_sw_init()968 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) { in mes_v10_1_sw_fini()1148 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) { in mes_v10_0_early_init()
571 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) { in mes_v11_0_enable()1042 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) { in mes_v11_0_sw_init()1076 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) { in mes_v11_0_sw_fini()1299 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) { in mes_v11_0_early_init()