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Searched refs:ACLK_PCIE30X2_SLV (Results 1 – 3 of 3) sorted by relevance

/linux-6.6.21/arch/arm64/boot/dts/rockchip/
Drk3568.dtsi121 clocks = <&cru ACLK_PCIE30X2_MST>, <&cru ACLK_PCIE30X2_SLV>,
/linux-6.6.21/include/dt-bindings/clock/
Drk3568-cru.h207 #define ACLK_PCIE30X2_SLV 144 macro
/linux-6.6.21/drivers/clk/rockchip/
Dclk-rk3568.c832 GATE(ACLK_PCIE30X2_SLV, "aclk_pcie30x2_slv", "aclk_pipe", 0,