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Searched refs:A10_SYSMGR_ECC_INTMASK_CLR_L2 (Results 1 – 1 of 1) sorted by relevance

/linux-6.6.21/arch/arm/mach-socfpga/
Dl2_cache.c17 #define A10_SYSMGR_ECC_INTMASK_CLR_L2 BIT(0) macro
73 writel(A10_SYSMGR_ECC_INTMASK_CLR_L2, sys_manager_base_addr + in socfpga_init_arria10_l2_ecc()