| /linux-6.1.9/drivers/gpu/drm/amd/amdkfd/ |
| D | kfd_kernel_queue.h | 71 uint64_t wptr_gpu_addr; member
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| D | kfd_kernel_queue.c | 122 kq->wptr_gpu_addr = kq->wptr_mem->gpu_addr; in kq_initialize()
137 prop.write_ptr = (uint32_t *) kq->wptr_gpu_addr; in kq_initialize()
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| /linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_ring.c | 269 ring->wptr_gpu_addr = in amdgpu_ring_init()
535 prop->wptr_gpu_addr = ring->wptr_gpu_addr; in amdgpu_ring_to_mqd_prop()
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| D | amdgpu_mes.c | 619 mqd_prop.wptr_gpu_addr = p->wptr_gpu_addr; in amdgpu_mes_queue_init_mqd()
707 queue_input.wptr_addr = qprops->wptr_gpu_addr; in amdgpu_mes_add_hw_queue()
727 queue->wptr_gpu_addr = qprops->wptr_gpu_addr; in amdgpu_mes_add_hw_queue()
933 props->wptr_gpu_addr = ring->wptr_gpu_addr; in amdgpu_mes_ring_to_queue_props()
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| D | amdgpu_mes.h | 173 uint64_t wptr_gpu_addr; member
183 uint64_t wptr_gpu_addr; member
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| D | sdma_v4_0.c | 1092 u64 wptr_gpu_addr; in sdma_v4_0_gfx_resume() local
1138 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v4_0_gfx_resume()
1140 lower_32_bits(wptr_gpu_addr)); in sdma_v4_0_gfx_resume()
1142 upper_32_bits(wptr_gpu_addr)); in sdma_v4_0_gfx_resume()
1179 u64 wptr_gpu_addr; in sdma_v4_0_page_resume() local
1226 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v4_0_page_resume()
1228 lower_32_bits(wptr_gpu_addr)); in sdma_v4_0_page_resume()
1230 upper_32_bits(wptr_gpu_addr)); in sdma_v4_0_page_resume()
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| D | sdma_v6_0.c | 481 u64 wptr_gpu_addr; in sdma_v6_0_gfx_resume() local
509 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v6_0_gfx_resume()
511 lower_32_bits(wptr_gpu_addr)); in sdma_v6_0_gfx_resume()
513 upper_32_bits(wptr_gpu_addr)); in sdma_v6_0_gfx_resume()
848 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v6_0_mqd_init()
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| D | sdma_v3_0.c | 649 u64 wptr_gpu_addr; in sdma_v3_0_gfx_resume() local
712 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v3_0_gfx_resume()
715 lower_32_bits(wptr_gpu_addr)); in sdma_v3_0_gfx_resume()
717 upper_32_bits(wptr_gpu_addr)); in sdma_v3_0_gfx_resume()
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| D | sdma_v5_2.c | 545 u64 wptr_gpu_addr; in sdma_v5_2_gfx_resume() local
572 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v5_2_gfx_resume()
574 lower_32_bits(wptr_gpu_addr)); in sdma_v5_2_gfx_resume()
576 upper_32_bits(wptr_gpu_addr)); in sdma_v5_2_gfx_resume()
853 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_2_mqd_init()
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| D | sdma_v5_0.c | 717 u64 wptr_gpu_addr; in sdma_v5_0_gfx_resume() local
744 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v5_0_gfx_resume()
746 lower_32_bits(wptr_gpu_addr)); in sdma_v5_0_gfx_resume()
748 upper_32_bits(wptr_gpu_addr)); in sdma_v5_0_gfx_resume()
982 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_0_mqd_init()
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| D | gfx_v11_0.c | 147 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx11_kiq_map_queues()
3165 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v11_0_cp_gfx_resume() local
3196 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v11_0_cp_gfx_resume()
3198 lower_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume()
3200 upper_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume()
3233 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v11_0_cp_gfx_resume()
3235 lower_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume()
3237 upper_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume()
3572 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_gfx_mqd_init()
3843 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_compute_mqd_init()
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| D | amdgpu_ring.h | 256 u64 wptr_gpu_addr; member
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| D | gfx_v9_0.c | 786 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx_v9_0_kiq_map_queues()
3121 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v9_0_cp_gfx_resume() local
3149 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v9_0_cp_gfx_resume()
3150 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); in gfx_v9_0_cp_gfx_resume()
3151 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI, upper_32_bits(wptr_gpu_addr)); in gfx_v9_0_cp_gfx_resume()
3367 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v9_0_mqd_init()
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| D | gfx_v10_0.c | 3527 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx10_kiq_map_queues()
6154 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v10_0_cp_gfx_resume() local
6188 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v10_0_cp_gfx_resume()
6190 lower_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume()
6192 upper_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume()
6225 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v10_0_cp_gfx_resume()
6227 lower_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume()
6229 upper_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume()
6470 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v10_0_gfx_mqd_init()
6753 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v10_0_compute_mqd_init()
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| D | gfx_v8_0.c | 4267 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v8_0_cp_gfx_resume() local
4297 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v8_0_cp_gfx_resume()
4298 WREG32(mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); in gfx_v8_0_cp_gfx_resume()
4299 WREG32(mmCP_RB_WPTR_POLL_ADDR_HI, upper_32_bits(wptr_gpu_addr)); in gfx_v8_0_cp_gfx_resume()
4380 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx_v8_0_kiq_kcq_enable()
4510 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v8_0_mqd_init()
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| D | mes_v10_1.c | 764 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v10_1_mqd_init()
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| D | amdgpu.h | 737 uint64_t wptr_gpu_addr; member
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| D | mes_v11_0.c | 815 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v11_0_mqd_init()
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| D | gfx_v7_0.c | 2948 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v7_0_mqd_init()
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