| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| D | dcn301_fpu.c | 294 struct dcn_watermarks *wm_set, in calculate_wm_set_for_vlevel() argument
311 wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
312 …wm_set->cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(dml, pipes, pipe_cnt) … in calculate_wm_set_for_vlevel()
313 wm_set->cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
314 wm_set->cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
315 wm_set->pte_meta_urgent_ns = get_wm_memory_trip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
316 wm_set->frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
317 wm_set->frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
318 wm_set->urgent_latency_ns = get_urgent_latency(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| D | dcn316_clk_mgr.c | 414 struct dcn316_watermarks *table = clk_mgr_dcn316->smu_wm_set.wm_set; in dcn316_notify_wm_ranges()
634 clk_mgr->smu_wm_set.wm_set = (struct dcn316_watermarks *)dm_helpers_allocate_gpu_mem( in dcn316_clk_mgr_construct()
640 if (!clk_mgr->smu_wm_set.wm_set) { in dcn316_clk_mgr_construct()
641 clk_mgr->smu_wm_set.wm_set = &dummy_wms; in dcn316_clk_mgr_construct()
644 ASSERT(clk_mgr->smu_wm_set.wm_set); in dcn316_clk_mgr_construct()
718 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in dcn316_clk_mgr_destroy()
720 clk_mgr->smu_wm_set.wm_set); in dcn316_clk_mgr_destroy()
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| D | dcn316_clk_mgr.h | 33 struct dcn316_watermarks *wm_set; member
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| D | vg_clk_mgr.c | 448 struct watermarks *table = clk_mgr_vgh->smu_wm_set.wm_set; in vg_notify_wm_ranges()
664 clk_mgr->smu_wm_set.wm_set = (struct watermarks *)dm_helpers_allocate_gpu_mem( in vg_clk_mgr_construct()
670 if (!clk_mgr->smu_wm_set.wm_set) { in vg_clk_mgr_construct()
671 clk_mgr->smu_wm_set.wm_set = &dummy_wms; in vg_clk_mgr_construct()
674 ASSERT(clk_mgr->smu_wm_set.wm_set); in vg_clk_mgr_construct()
744 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in vg_clk_mgr_destroy()
746 clk_mgr->smu_wm_set.wm_set); in vg_clk_mgr_destroy()
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| D | vg_clk_mgr.h | 36 struct watermarks *wm_set; member
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| D | dcn31_clk_mgr.c | 478 struct dcn31_watermarks *table = clk_mgr_dcn31->smu_wm_set.wm_set; in dcn31_notify_wm_ranges()
688 clk_mgr->smu_wm_set.wm_set = (struct dcn31_watermarks *)dm_helpers_allocate_gpu_mem( in dcn31_clk_mgr_construct()
694 if (!clk_mgr->smu_wm_set.wm_set) { in dcn31_clk_mgr_construct()
695 clk_mgr->smu_wm_set.wm_set = &dummy_wms; in dcn31_clk_mgr_construct()
698 ASSERT(clk_mgr->smu_wm_set.wm_set); in dcn31_clk_mgr_construct()
806 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in dcn31_clk_mgr_destroy()
808 clk_mgr->smu_wm_set.wm_set); in dcn31_clk_mgr_destroy()
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| D | dcn31_clk_mgr.h | 33 struct dcn31_watermarks *wm_set; member
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| D | dcn315_clk_mgr.h | 33 struct dcn315_watermarks *wm_set; member
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| D | dcn315_clk_mgr.c | 422 struct dcn315_watermarks *table = clk_mgr_dcn315->smu_wm_set.wm_set; in dcn315_notify_wm_ranges()
625 clk_mgr->smu_wm_set.wm_set = (struct dcn315_watermarks *)dm_helpers_allocate_gpu_mem( in dcn315_clk_mgr_construct()
631 if (!clk_mgr->smu_wm_set.wm_set) { in dcn315_clk_mgr_construct()
632 clk_mgr->smu_wm_set.wm_set = &dummy_wms; in dcn315_clk_mgr_construct()
635 ASSERT(clk_mgr->smu_wm_set.wm_set); in dcn315_clk_mgr_construct()
740 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in dcn315_clk_mgr_destroy()
742 clk_mgr->smu_wm_set.wm_set); in dcn315_clk_mgr_destroy()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| D | dcn314_clk_mgr.h | 34 struct dcn314_watermarks *wm_set; member
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| D | dcn314_clk_mgr.c | 497 struct dcn314_watermarks *table = clk_mgr_dcn314->smu_wm_set.wm_set; in dcn314_notify_wm_ranges()
738 clk_mgr->smu_wm_set.wm_set = (struct dcn314_watermarks *)dm_helpers_allocate_gpu_mem( in dcn314_clk_mgr_construct()
744 if (!clk_mgr->smu_wm_set.wm_set) { in dcn314_clk_mgr_construct()
745 clk_mgr->smu_wm_set.wm_set = &dummy_wms; in dcn314_clk_mgr_construct()
748 ASSERT(clk_mgr->smu_wm_set.wm_set); in dcn314_clk_mgr_construct()
856 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in dcn314_clk_mgr_destroy()
858 clk_mgr->smu_wm_set.wm_set); in dcn314_clk_mgr_destroy()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_hubbub.c | 495 s->wm_set = 0; in hubbub2_wm_read_state()
506 s->wm_set = 1; in hubbub2_wm_read_state()
517 s->wm_set = 2; in hubbub2_wm_read_state()
528 s->wm_set = 3; in hubbub2_wm_read_state()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | dchubbub.h | 44 uint32_t wm_set; member
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hubbub.c | 51 s->wm_set = 0; in hubbub1_wm_read_state()
61 s->wm_set = 1; in hubbub1_wm_read_state()
71 s->wm_set = 2; in hubbub1_wm_read_state()
81 s->wm_set = 3; in hubbub1_wm_read_state()
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| D | dcn10_hw_sequencer_debug.c | 96 s->wm_set, in dcn10_get_hubbub_state()
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| D | dcn10_hw_sequencer.c | 155 DTN_INFO("WM_Set[%d]:", s->wm_set); in dcn10_log_hubbub_state()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_hubbub.c | 627 s->wm_set = 0; in hubbub21_wm_read_state()
641 s->wm_set = 1; in hubbub21_wm_read_state()
655 s->wm_set = 2; in hubbub21_wm_read_state()
669 s->wm_set = 3; in hubbub21_wm_read_state()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/ |
| D | dcn32_hubbub.c | 836 s->wm_set = 0; in hubbub32_wm_read_state()
856 s->wm_set = 1; in hubbub32_wm_read_state()
876 s->wm_set = 2; in hubbub32_wm_read_state()
896 s->wm_set = 3; in hubbub32_wm_read_state()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | dcn20_fpu.c | 2039 struct dcn_watermarks *wm_set, in calculate_wm_set_for_vlevel() argument
2056 wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
2057 …wm_set->cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(dml, pipes, pipe_cnt) … in calculate_wm_set_for_vlevel()
2058 wm_set->cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
2059 wm_set->cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
2060 wm_set->pte_meta_urgent_ns = get_wm_memory_trip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
2061 wm_set->frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
2062 wm_set->frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
2063 wm_set->urgent_latency_ns = get_urgent_latency(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
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