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Searched refs:wm_mask (Results 1 – 7 of 7) sorted by relevance

/linux-6.1.9/drivers/net/wireless/ath/ath10k/
Dhw.c253 .wm_mask = 0x0000001E,
407 .wm_mask = 0x0000001E,
Dhw.h319 u32 wm_mask; member
Dce.c446 host_ie_addr & ~(wm_regs->wm_mask)); in ath10k_ce_watermark_intr_disable()
1313 wm_regs->cc_mask | wm_regs->wm_mask); in ath10k_ce_per_engine_service()
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Ddce_v10_0.c1036 u32 tmp, wm_mask, lb_vblank_lead_lines = 0; in dce_v10_0_program_watermarks() local
1126 wm_mask = RREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset); in dce_v10_0_program_watermarks()
1127 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 1); in dce_v10_0_program_watermarks()
1134 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 2); in dce_v10_0_program_watermarks()
1141 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, wm_mask); in dce_v10_0_program_watermarks()
Ddce_v11_0.c1062 u32 tmp, wm_mask, lb_vblank_lead_lines = 0; in dce_v11_0_program_watermarks() local
1152 wm_mask = RREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset); in dce_v11_0_program_watermarks()
1153 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 1); in dce_v11_0_program_watermarks()
1160 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 2); in dce_v11_0_program_watermarks()
1167 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, wm_mask); in dce_v11_0_program_watermarks()
Ddce_v8_0.c971 u32 tmp, wm_mask, lb_vblank_lead_lines = 0; in dce_v8_0_program_watermarks() local
1061 wm_mask = RREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset); in dce_v8_0_program_watermarks()
1062 tmp = wm_mask; in dce_v8_0_program_watermarks()
1078 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, wm_mask); in dce_v8_0_program_watermarks()
/linux-6.1.9/drivers/gpu/drm/radeon/
Dcik.c9238 u32 tmp, wm_mask; in dce8_program_watermarks() local
9332 wm_mask = RREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset); in dce8_program_watermarks()
9333 tmp = wm_mask; in dce8_program_watermarks()
9349 WREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset, wm_mask); in dce8_program_watermarks()