Searched refs:wm_clk_ranges (Results 1 – 4 of 4) sorted by relevance
999 clk_ranges.wm_clk_ranges[0].wm_set_id = WM_SET_A; in bw_calcs_data_update_from_pplib()1000 clk_ranges.wm_clk_ranges[0].wm_min_eng_clk_in_khz = in bw_calcs_data_update_from_pplib()1002 clk_ranges.wm_clk_ranges[0].wm_max_eng_clk_in_khz = in bw_calcs_data_update_from_pplib()1004 clk_ranges.wm_clk_ranges[0].wm_min_mem_clk_in_khz = in bw_calcs_data_update_from_pplib()1006 clk_ranges.wm_clk_ranges[0].wm_max_mem_clk_in_khz = in bw_calcs_data_update_from_pplib()1009 clk_ranges.wm_clk_ranges[1].wm_set_id = WM_SET_B; in bw_calcs_data_update_from_pplib()1010 clk_ranges.wm_clk_ranges[1].wm_min_eng_clk_in_khz = in bw_calcs_data_update_from_pplib()1013 clk_ranges.wm_clk_ranges[1].wm_max_eng_clk_in_khz = 5000000; in bw_calcs_data_update_from_pplib()1014 clk_ranges.wm_clk_ranges[1].wm_min_mem_clk_in_khz = in bw_calcs_data_update_from_pplib()1016 clk_ranges.wm_clk_ranges[1].wm_max_mem_clk_in_khz = in bw_calcs_data_update_from_pplib()[all …]
1162 clk_ranges.wm_clk_ranges[0].wm_set_id = WM_SET_A; in bw_calcs_data_update_from_pplib()1163 clk_ranges.wm_clk_ranges[0].wm_min_eng_clk_in_khz = in bw_calcs_data_update_from_pplib()1165 clk_ranges.wm_clk_ranges[0].wm_max_eng_clk_in_khz = in bw_calcs_data_update_from_pplib()1167 clk_ranges.wm_clk_ranges[0].wm_min_mem_clk_in_khz = in bw_calcs_data_update_from_pplib()1169 clk_ranges.wm_clk_ranges[0].wm_max_mem_clk_in_khz = in bw_calcs_data_update_from_pplib()1172 clk_ranges.wm_clk_ranges[1].wm_set_id = WM_SET_B; in bw_calcs_data_update_from_pplib()1173 clk_ranges.wm_clk_ranges[1].wm_min_eng_clk_in_khz = in bw_calcs_data_update_from_pplib()1176 clk_ranges.wm_clk_ranges[1].wm_max_eng_clk_in_khz = 5000000; in bw_calcs_data_update_from_pplib()1177 clk_ranges.wm_clk_ranges[1].wm_min_mem_clk_in_khz = in bw_calcs_data_update_from_pplib()1179 clk_ranges.wm_clk_ranges[1].wm_max_mem_clk_in_khz = in bw_calcs_data_update_from_pplib()[all …]
154 struct dm_pp_clock_range_for_wm_set wm_clk_ranges[MAX_WM_SETS]; member
5286 if (dep_sclk_table->entries[i].clk >= watermarks->wm_clk_ranges[k].wm_min_eng_clk_in_khz / 10 && in smu7_set_watermarks_for_clocks_ranges()5287 dep_sclk_table->entries[i].clk < watermarks->wm_clk_ranges[k].wm_max_eng_clk_in_khz / 10 && in smu7_set_watermarks_for_clocks_ranges()5288 dep_mclk_table->entries[i].clk >= watermarks->wm_clk_ranges[k].wm_min_mem_clk_in_khz / 10 && in smu7_set_watermarks_for_clocks_ranges()5289 dep_mclk_table->entries[i].clk < watermarks->wm_clk_ranges[k].wm_max_mem_clk_in_khz / 10) { in smu7_set_watermarks_for_clocks_ranges()5291 table->DisplayWatermark[i][j] = watermarks->wm_clk_ranges[k].wm_set_id; in smu7_set_watermarks_for_clocks_ranges()5297 table->DisplayWatermark[i][j] = watermarks->wm_clk_ranges[k - 1].wm_set_id); in smu7_set_watermarks_for_clocks_ranges()