Searched refs:wm0 (Results 1 – 4 of 4) sorted by relevance
/linux-6.1.9/drivers/gpu/drm/radeon/ |
D | rs690.c | 461 struct rs690_watermark *wm0, in rs690_compute_mode_priority() argument 475 if (dfixed_trunc(wm0->dbpp) > 64) in rs690_compute_mode_priority() 476 a.full = dfixed_mul(wm0->dbpp, wm0->num_line_pair); in rs690_compute_mode_priority() 478 a.full = wm0->num_line_pair.full; in rs690_compute_mode_priority() 484 fill_rate.full = dfixed_div(wm0->sclk, a); in rs690_compute_mode_priority() 485 if (wm0->consumption_rate.full > fill_rate.full) { in rs690_compute_mode_priority() 486 b.full = wm0->consumption_rate.full - fill_rate.full; in rs690_compute_mode_priority() 487 b.full = dfixed_mul(b, wm0->active_time); in rs690_compute_mode_priority() 488 a.full = dfixed_mul(wm0->worst_case_latency, in rs690_compute_mode_priority() 489 wm0->consumption_rate); in rs690_compute_mode_priority() [all …]
|
D | rv515.c | 1080 struct rv515_watermark *wm0, in rv515_compute_mode_priority() argument 1094 if (dfixed_trunc(wm0->dbpp) > 64) in rv515_compute_mode_priority() 1095 a.full = dfixed_div(wm0->dbpp, wm0->num_line_pair); in rv515_compute_mode_priority() 1097 a.full = wm0->num_line_pair.full; in rv515_compute_mode_priority() 1103 fill_rate.full = dfixed_div(wm0->sclk, a); in rv515_compute_mode_priority() 1104 if (wm0->consumption_rate.full > fill_rate.full) { in rv515_compute_mode_priority() 1105 b.full = wm0->consumption_rate.full - fill_rate.full; in rv515_compute_mode_priority() 1106 b.full = dfixed_mul(b, wm0->active_time); in rv515_compute_mode_priority() 1109 a.full = dfixed_mul(wm0->worst_case_latency, in rv515_compute_mode_priority() 1110 wm0->consumption_rate); in rv515_compute_mode_priority() [all …]
|
/linux-6.1.9/drivers/gpu/drm/i915/display/ |
D | skl_watermark.c | 402 if (wm->wm[0].enable && !wm->sagv.wm0.enable) in tgl_crtc_can_enable_sagv() 1364 return &wm->sagv.wm0; in skl_plane_wm_level() 1619 skl_check_wm_level(&wm->sagv.wm0, ddb); in skl_crtc_allocate_plane_ddb() 2006 struct skl_wm_level *sagv_wm = &plane_wm->sagv.wm0; in tgl_compute_sagv_wm() 2020 const struct skl_wm_level *wm0, in skl_compute_transition_wm() argument 2060 wm0_blocks = wm0->blocks - 1; in skl_compute_transition_wm() 2077 trans_wm->min_ddb_alloc = max_t(u16, wm0->min_ddb_alloc, blocks + 1); in skl_compute_transition_wm() 2105 &wm->sagv.wm0, &wm_params); in skl_build_plane_wm_single() 2287 &wm->sagv.wm0); in skl_write_plane_wm() 2322 &wm->sagv.wm0); in skl_write_cursor_wm() [all …]
|
D | intel_display_types.h | 843 struct skl_wm_level wm0; member
|