Home
last modified time | relevance | path

Searched refs:wdt (Results 1 – 25 of 499) sorted by relevance

12345678910>>...20

/linux-6.1.9/drivers/watchdog/
Dsama5d4_wdt.c52 #define wdt_enabled (!(wdt->mr & AT91_WDT_WDDIS))
54 #define wdt_read(wdt, field) \ argument
55 readl_relaxed((wdt)->reg_base + (field))
60 static void wdt_write(struct sama5d4_wdt *wdt, u32 field, u32 val) in wdt_write() argument
67 while (time_before(jiffies, wdt->last_ping + WDT_DELAY)) in wdt_write()
69 writel_relaxed(val, wdt->reg_base + field); in wdt_write()
70 wdt->last_ping = jiffies; in wdt_write()
73 static void wdt_write_nosleep(struct sama5d4_wdt *wdt, u32 field, u32 val) in wdt_write_nosleep() argument
75 if (time_before(jiffies, wdt->last_ping + WDT_DELAY)) in wdt_write_nosleep()
77 writel_relaxed(val, wdt->reg_base + field); in wdt_write_nosleep()
[all …]
Ds3c2410_wdt.c298 static inline unsigned long s3c2410wdt_get_freq(struct s3c2410_wdt *wdt) in s3c2410wdt_get_freq() argument
300 return clk_get_rate(wdt->src_clk ? wdt->src_clk : wdt->bus_clk); in s3c2410wdt_get_freq()
303 static inline unsigned int s3c2410wdt_max_timeout(struct s3c2410_wdt *wdt) in s3c2410wdt_max_timeout() argument
305 const unsigned long freq = s3c2410wdt_get_freq(wdt); in s3c2410wdt_max_timeout()
316 static int s3c2410wdt_disable_wdt_reset(struct s3c2410_wdt *wdt, bool mask) in s3c2410wdt_disable_wdt_reset() argument
318 const u32 mask_val = BIT(wdt->drv_data->mask_bit); in s3c2410wdt_disable_wdt_reset()
322 ret = regmap_update_bits(wdt->pmureg, wdt->drv_data->disable_reg, in s3c2410wdt_disable_wdt_reset()
325 dev_err(wdt->dev, "failed to update reg(%d)\n", ret); in s3c2410wdt_disable_wdt_reset()
330 static int s3c2410wdt_mask_wdt_reset(struct s3c2410_wdt *wdt, bool mask) in s3c2410wdt_mask_wdt_reset() argument
332 const u32 mask_val = BIT(wdt->drv_data->mask_bit); in s3c2410wdt_mask_wdt_reset()
[all …]
Dat91sam9_wdt.c40 #define wdt_read(wdt, field) \ argument
41 readl_relaxed((wdt)->base + (field))
43 writel_relaxed((val), (wdt)->base + (field))
98 struct at91wdt *wdt = (struct at91wdt *)dev_id; in wdt_interrupt() local
100 if (wdt_read(wdt, AT91_WDT_SR)) { in wdt_interrupt()
112 static inline void at91_wdt_reset(struct at91wdt *wdt) in at91_wdt_reset() argument
114 wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT); in at91_wdt_reset()
122 struct at91wdt *wdt = from_timer(wdt, t, timer); in at91_ping() local
123 if (time_before(jiffies, wdt->next_heartbeat) || in at91_ping()
124 !watchdog_active(&wdt->wdd)) { in at91_ping()
[all …]
Dmei_wdt.c166 static int mei_wdt_ping(struct mei_wdt *wdt) in mei_wdt_ping() argument
177 req.timeout = wdt->timeout; in mei_wdt_ping()
179 ret = mei_cldev_send(wdt->cldev, (u8 *)&req, req_len); in mei_wdt_ping()
194 static int mei_wdt_stop(struct mei_wdt *wdt) in mei_wdt_stop() argument
206 ret = mei_cldev_send(wdt->cldev, (u8 *)&req, req_len); in mei_wdt_stop()
222 struct mei_wdt *wdt = watchdog_get_drvdata(wdd); in mei_wdt_ops_start() local
224 wdt->state = MEI_WDT_START; in mei_wdt_ops_start()
225 wdd->timeout = wdt->timeout; in mei_wdt_ops_start()
238 struct mei_wdt *wdt = watchdog_get_drvdata(wdd); in mei_wdt_ops_stop() local
241 if (wdt->state != MEI_WDT_RUNNING) in mei_wdt_ops_stop()
[all …]
Dsp805_wdt.c85 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd); in wdt_is_running() local
86 u32 wdtcontrol = readl_relaxed(wdt->base + WDTCONTROL); in wdt_is_running()
94 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd); in wdt_setload() local
97 rate = wdt->rate; in wdt_setload()
110 spin_lock(&wdt->lock); in wdt_setload()
111 wdt->load_val = load; in wdt_setload()
114 spin_unlock(&wdt->lock); in wdt_setload()
122 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd); in wdt_timeleft() local
125 spin_lock(&wdt->lock); in wdt_timeleft()
126 load = readl_relaxed(wdt->base + WDTVALUE); in wdt_timeleft()
[all …]
Dsprd_wdt.c84 struct sprd_wdt *wdt = (struct sprd_wdt *)dev_id; in sprd_wdt_isr() local
86 sprd_wdt_unlock(wdt->base); in sprd_wdt_isr()
87 writel_relaxed(SPRD_WDT_INT_CLEAR_BIT, wdt->base + SPRD_WDT_INT_CLR); in sprd_wdt_isr()
88 sprd_wdt_lock(wdt->base); in sprd_wdt_isr()
89 watchdog_notify_pretimeout(&wdt->wdd); in sprd_wdt_isr()
93 static u32 sprd_wdt_get_cnt_value(struct sprd_wdt *wdt) in sprd_wdt_get_cnt_value() argument
97 val = readl_relaxed(wdt->base + SPRD_WDT_CNT_HIGH) << in sprd_wdt_get_cnt_value()
99 val |= readl_relaxed(wdt->base + SPRD_WDT_CNT_LOW) & in sprd_wdt_get_cnt_value()
105 static int sprd_wdt_load_value(struct sprd_wdt *wdt, u32 timeout, in sprd_wdt_load_value() argument
119 val = readl_relaxed(wdt->base + SPRD_WDT_INT_RAW); in sprd_wdt_load_value()
[all …]
Dkeembay_wdt.c59 static inline u32 keembay_wdt_readl(struct keembay_wdt *wdt, u32 offset) in keembay_wdt_readl() argument
61 return readl(wdt->base + offset); in keembay_wdt_readl()
64 static inline void keembay_wdt_writel(struct keembay_wdt *wdt, u32 offset, u32 val) in keembay_wdt_writel() argument
66 writel(WDT_UNLOCK, wdt->base + TIM_SAFE); in keembay_wdt_writel()
67 writel(val, wdt->base + offset); in keembay_wdt_writel()
72 struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); in keembay_wdt_set_timeout_reg() local
74 keembay_wdt_writel(wdt, TIM_WATCHDOG, wdog->timeout * wdt->rate); in keembay_wdt_set_timeout_reg()
79 struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); in keembay_wdt_set_pretimeout_reg() local
85 keembay_wdt_writel(wdt, TIM_WATCHDOG_INT_THRES, th_val * wdt->rate); in keembay_wdt_set_pretimeout_reg()
90 struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); in keembay_wdt_start() local
[all …]
Dmlx_wdt.c57 static void mlxreg_wdt_check_card_reset(struct mlxreg_wdt *wdt) in mlxreg_wdt_check_card_reset() argument
63 if (wdt->reset_idx == -EINVAL) in mlxreg_wdt_check_card_reset()
66 if (!(wdt->wdd.info->options & WDIOF_CARDRESET)) in mlxreg_wdt_check_card_reset()
69 reg_data = &wdt->pdata->data[wdt->reset_idx]; in mlxreg_wdt_check_card_reset()
70 rc = regmap_read(wdt->regmap, reg_data->reg, &regval); in mlxreg_wdt_check_card_reset()
73 wdt->wdd.bootstatus = WDIOF_CARDRESET; in mlxreg_wdt_check_card_reset()
74 dev_info(wdt->wdd.parent, in mlxreg_wdt_check_card_reset()
82 struct mlxreg_wdt *wdt = watchdog_get_drvdata(wdd); in mlxreg_wdt_start() local
83 struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->action_idx]; in mlxreg_wdt_start()
85 return regmap_update_bits(wdt->regmap, reg_data->reg, ~reg_data->mask, in mlxreg_wdt_start()
[all …]
Dmax63xx_wdt.c57 void (*ping)(struct max63xx_wdt *wdt);
58 void (*set)(struct max63xx_wdt *wdt, u8 set);
123 struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd); in max63xx_wdt_ping() local
125 wdt->ping(wdt); in max63xx_wdt_ping()
131 struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd); in max63xx_wdt_start() local
133 wdt->set(wdt, wdt->timeout->wdset); in max63xx_wdt_start()
136 if (wdt->timeout->tdelay == 0) in max63xx_wdt_start()
137 wdt->ping(wdt); in max63xx_wdt_start()
143 struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd); in max63xx_wdt_stop() local
145 wdt->set(wdt, MAX6369_WDSET_DISABLED); in max63xx_wdt_stop()
[all …]
Dpm8916_wdt.c47 struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev); in pm8916_wdt_start() local
49 return regmap_update_bits(wdt->regmap, in pm8916_wdt_start()
50 wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL2, in pm8916_wdt_start()
56 struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev); in pm8916_wdt_stop() local
58 return regmap_update_bits(wdt->regmap, in pm8916_wdt_stop()
59 wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL2, in pm8916_wdt_stop()
65 struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev); in pm8916_wdt_ping() local
67 return regmap_write(wdt->regmap, wdt->baseaddr + PON_PMIC_WD_RESET_PET, in pm8916_wdt_ping()
73 struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev); in pm8916_wdt_configure_timers() local
76 err = regmap_write(wdt->regmap, in pm8916_wdt_configure_timers()
[all …]
Dqcom-wdt.c54 static void __iomem *wdt_addr(struct qcom_wdt *wdt, enum wdt_reg reg) in wdt_addr() argument
56 return wdt->base + wdt->layout[reg]; in wdt_addr()
76 struct qcom_wdt *wdt = to_qcom_wdt(wdd); in qcom_wdt_start() local
79 writel(0, wdt_addr(wdt, WDT_EN)); in qcom_wdt_start()
80 writel(1, wdt_addr(wdt, WDT_RST)); in qcom_wdt_start()
81 writel(bark * wdt->rate, wdt_addr(wdt, WDT_BARK_TIME)); in qcom_wdt_start()
82 writel(wdd->timeout * wdt->rate, wdt_addr(wdt, WDT_BITE_TIME)); in qcom_wdt_start()
83 writel(QCOM_WDT_ENABLE, wdt_addr(wdt, WDT_EN)); in qcom_wdt_start()
89 struct qcom_wdt *wdt = to_qcom_wdt(wdd); in qcom_wdt_stop() local
91 writel(0, wdt_addr(wdt, WDT_EN)); in qcom_wdt_stop()
[all …]
Dda9062_wdt.c38 static unsigned int da9062_wdt_read_timeout(struct da9062_watchdog *wdt) in da9062_wdt_read_timeout() argument
42 regmap_read(wdt->hw->regmap, DA9062AA_CONTROL_D, &val); in da9062_wdt_read_timeout()
59 static int da9062_reset_watchdog_timer(struct da9062_watchdog *wdt) in da9062_reset_watchdog_timer() argument
61 return regmap_update_bits(wdt->hw->regmap, DA9062AA_CONTROL_F, in da9062_reset_watchdog_timer()
66 static int da9062_wdt_update_timeout_register(struct da9062_watchdog *wdt, in da9062_wdt_update_timeout_register() argument
69 struct da9062 *chip = wdt->hw; in da9062_wdt_update_timeout_register()
86 struct da9062_watchdog *wdt = watchdog_get_drvdata(wdd); in da9062_wdt_start() local
90 selector = da9062_wdt_timeout_to_sel(wdt->wdtdev.timeout); in da9062_wdt_start()
91 ret = da9062_wdt_update_timeout_register(wdt, selector); in da9062_wdt_start()
93 dev_err(wdt->hw->dev, "Watchdog failed to start (err = %d)\n", in da9062_wdt_start()
[all …]
Dbcm7038_wdt.c59 struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog); in bcm7038_wdt_set_timeout_reg() local
62 timeout = wdt->rate * wdog->timeout; in bcm7038_wdt_set_timeout_reg()
64 bcm7038_wdt_write(timeout, wdt->base + WDT_TIMEOUT_REG); in bcm7038_wdt_set_timeout_reg()
69 struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog); in bcm7038_wdt_ping() local
71 bcm7038_wdt_write(WDT_START_1, wdt->base + WDT_CMD_REG); in bcm7038_wdt_ping()
72 bcm7038_wdt_write(WDT_START_2, wdt->base + WDT_CMD_REG); in bcm7038_wdt_ping()
87 struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog); in bcm7038_wdt_stop() local
89 bcm7038_wdt_write(WDT_STOP_1, wdt->base + WDT_CMD_REG); in bcm7038_wdt_stop()
90 bcm7038_wdt_write(WDT_STOP_2, wdt->base + WDT_CMD_REG); in bcm7038_wdt_stop()
108 struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog); in bcm7038_wdt_get_timeleft() local
[all …]
Dbcm47xx_wdt.c50 struct bcm47xx_wdt *wdt = bcm47xx_wdt_get(wdd); in bcm47xx_wdt_hard_keepalive() local
52 wdt->timer_set_ms(wdt, wdd->timeout * 1000); in bcm47xx_wdt_hard_keepalive()
64 struct bcm47xx_wdt *wdt = bcm47xx_wdt_get(wdd); in bcm47xx_wdt_hard_stop() local
66 wdt->timer_set(wdt, 0); in bcm47xx_wdt_hard_stop()
74 struct bcm47xx_wdt *wdt = bcm47xx_wdt_get(wdd); in bcm47xx_wdt_hard_set_timeout() local
75 u32 max_timer = wdt->max_timer_ms; in bcm47xx_wdt_hard_set_timeout()
90 struct bcm47xx_wdt *wdt = bcm47xx_wdt_get(wdd); in bcm47xx_wdt_restart() local
92 wdt->timer_set(wdt, 1); in bcm47xx_wdt_restart()
108 struct bcm47xx_wdt *wdt = from_timer(wdt, t, soft_timer); in bcm47xx_wdt_soft_timer_tick() local
109 u32 next_tick = min(wdt->wdd.timeout * 1000, wdt->max_timer_ms); in bcm47xx_wdt_soft_timer_tick()
[all …]
Dbcm_kona_wdt.c58 static int secure_register_read(struct bcm_kona_wdt *wdt, uint32_t offset) in secure_register_read() argument
71 val = readl_relaxed(wdt->base + offset); in secure_register_read()
77 if (count > wdt->busy_count) in secure_register_read()
78 wdt->busy_count = count; in secure_register_read()
97 struct bcm_kona_wdt *wdt = s->private; in bcm_kona_show() local
99 if (!wdt) { in bcm_kona_show()
104 spin_lock_irqsave(&wdt->lock, flags); in bcm_kona_show()
105 ctl_val = secure_register_read(wdt, SECWDOG_CTRL_REG); in bcm_kona_show()
106 cur_val = secure_register_read(wdt, SECWDOG_COUNT_REG); in bcm_kona_show()
107 spin_unlock_irqrestore(&wdt->lock, flags); in bcm_kona_show()
[all …]
Dapple_wdt.c69 struct apple_wdt *wdt = to_apple_wdt(wdd); in apple_wdt_start() local
71 writel_relaxed(0, wdt->regs + APPLE_WDT_WD1_CUR_TIME); in apple_wdt_start()
72 writel_relaxed(APPLE_WDT_CTRL_RESET_EN, wdt->regs + APPLE_WDT_WD1_CTRL); in apple_wdt_start()
79 struct apple_wdt *wdt = to_apple_wdt(wdd); in apple_wdt_stop() local
81 writel_relaxed(0, wdt->regs + APPLE_WDT_WD1_CTRL); in apple_wdt_stop()
88 struct apple_wdt *wdt = to_apple_wdt(wdd); in apple_wdt_ping() local
90 writel_relaxed(0, wdt->regs + APPLE_WDT_WD1_CUR_TIME); in apple_wdt_ping()
97 struct apple_wdt *wdt = to_apple_wdt(wdd); in apple_wdt_set_timeout() local
99 writel_relaxed(0, wdt->regs + APPLE_WDT_WD1_CUR_TIME); in apple_wdt_set_timeout()
100 writel_relaxed(wdt->clk_rate * s, wdt->regs + APPLE_WDT_WD1_BITE_TIME); in apple_wdt_set_timeout()
[all …]
Dcadence_wdt.c85 static inline void cdns_wdt_writereg(struct cdns_wdt *wdt, u32 offset, u32 val) in cdns_wdt_writereg() argument
87 writel_relaxed(val, wdt->regs + offset); in cdns_wdt_writereg()
126 struct cdns_wdt *wdt = watchdog_get_drvdata(wdd); in cdns_wdt_stop() local
128 spin_lock(&wdt->io_lock); in cdns_wdt_stop()
129 cdns_wdt_writereg(wdt, CDNS_WDT_ZMR_OFFSET, in cdns_wdt_stop()
131 spin_unlock(&wdt->io_lock); in cdns_wdt_stop()
147 struct cdns_wdt *wdt = watchdog_get_drvdata(wdd); in cdns_wdt_reload() local
149 spin_lock(&wdt->io_lock); in cdns_wdt_reload()
150 cdns_wdt_writereg(wdt, CDNS_WDT_RESTART_OFFSET, in cdns_wdt_reload()
152 spin_unlock(&wdt->io_lock); in cdns_wdt_reload()
[all …]
Daspeed_wdt.c109 static void aspeed_wdt_enable(struct aspeed_wdt *wdt, int count) in aspeed_wdt_enable() argument
111 wdt->ctrl |= WDT_CTRL_ENABLE; in aspeed_wdt_enable()
113 writel(0, wdt->base + WDT_CTRL); in aspeed_wdt_enable()
114 writel(count, wdt->base + WDT_RELOAD_VALUE); in aspeed_wdt_enable()
115 writel(WDT_RESTART_MAGIC, wdt->base + WDT_RESTART); in aspeed_wdt_enable()
116 writel(wdt->ctrl, wdt->base + WDT_CTRL); in aspeed_wdt_enable()
121 struct aspeed_wdt *wdt = to_aspeed_wdt(wdd); in aspeed_wdt_start() local
123 aspeed_wdt_enable(wdt, wdd->timeout * WDT_RATE_1MHZ); in aspeed_wdt_start()
130 struct aspeed_wdt *wdt = to_aspeed_wdt(wdd); in aspeed_wdt_stop() local
132 wdt->ctrl &= ~WDT_CTRL_ENABLE; in aspeed_wdt_stop()
[all …]
Dpic32-wdt.c45 static inline bool pic32_wdt_is_win_enabled(struct pic32_wdt *wdt) in pic32_wdt_is_win_enabled() argument
47 return !!(readl(wdt->regs + WDTCON_REG) & WDTCON_WIN_EN); in pic32_wdt_is_win_enabled()
50 static inline u32 pic32_wdt_get_post_scaler(struct pic32_wdt *wdt) in pic32_wdt_get_post_scaler() argument
52 u32 v = readl(wdt->regs + WDTCON_REG); in pic32_wdt_get_post_scaler()
57 static inline u32 pic32_wdt_get_clk_id(struct pic32_wdt *wdt) in pic32_wdt_get_clk_id() argument
59 u32 v = readl(wdt->regs + WDTCON_REG); in pic32_wdt_get_clk_id()
64 static int pic32_wdt_bootstatus(struct pic32_wdt *wdt) in pic32_wdt_bootstatus() argument
66 u32 v = readl(wdt->rst_base); in pic32_wdt_bootstatus()
68 writel(RESETCON_WDT_TIMEOUT, PIC32_CLR(wdt->rst_base)); in pic32_wdt_bootstatus()
73 static u32 pic32_wdt_get_timeout_secs(struct pic32_wdt *wdt, struct device *dev) in pic32_wdt_get_timeout_secs() argument
[all …]
Dmax77620_wdt.c74 struct max77620_wdt *wdt = watchdog_get_drvdata(wdt_dev); in max77620_wdt_start() local
76 return regmap_update_bits(wdt->rmap, wdt->drv_data->reg_cnfg_glbl2, in max77620_wdt_start()
82 struct max77620_wdt *wdt = watchdog_get_drvdata(wdt_dev); in max77620_wdt_stop() local
84 return regmap_update_bits(wdt->rmap, wdt->drv_data->reg_cnfg_glbl2, in max77620_wdt_stop()
90 struct max77620_wdt *wdt = watchdog_get_drvdata(wdt_dev); in max77620_wdt_ping() local
92 return regmap_update_bits(wdt->rmap, wdt->drv_data->reg_cnfg_glbl3, in max77620_wdt_ping()
93 wdt->drv_data->wdtc_mask, 0x1); in max77620_wdt_ping()
99 struct max77620_wdt *wdt = watchdog_get_drvdata(wdt_dev); in max77620_wdt_set_timeout() local
131 ret = regmap_update_bits(wdt->rmap, wdt->drv_data->reg_cnfg_glbl3, in max77620_wdt_set_timeout()
132 wdt->drv_data->wdtc_mask, 0x1); in max77620_wdt_set_timeout()
[all …]
Dnpcm_wdt.c57 struct npcm_wdt *wdt = to_npcm_wdt(wdd); in npcm_wdt_ping() local
60 val = readl(wdt->reg); in npcm_wdt_ping()
61 writel(val | NPCM_WTR, wdt->reg); in npcm_wdt_ping()
68 struct npcm_wdt *wdt = to_npcm_wdt(wdd); in npcm_wdt_start() local
71 if (wdt->clk) in npcm_wdt_start()
72 clk_prepare_enable(wdt->clk); in npcm_wdt_start()
97 writel(val, wdt->reg); in npcm_wdt_start()
104 struct npcm_wdt *wdt = to_npcm_wdt(wdd); in npcm_wdt_stop() local
106 writel(0, wdt->reg); in npcm_wdt_stop()
108 if (wdt->clk) in npcm_wdt_stop()
[all …]
Dni903x_wdt.c56 static void ni903x_start(struct ni903x_wdt *wdt) in ni903x_start() argument
58 u8 control = inb(wdt->io_base + NIWD_CONTROL); in ni903x_start()
60 outb(control | NIWD_CONTROL_RESET, wdt->io_base + NIWD_CONTROL); in ni903x_start()
61 outb(control | NIWD_CONTROL_PET, wdt->io_base + NIWD_CONTROL); in ni903x_start()
67 struct ni903x_wdt *wdt = watchdog_get_drvdata(wdd); in ni903x_wdd_set_timeout() local
70 outb(((0x00FF0000 & counter) >> 16), wdt->io_base + NIWD_SEED2); in ni903x_wdd_set_timeout()
71 outb(((0x0000FF00 & counter) >> 8), wdt->io_base + NIWD_SEED1); in ni903x_wdd_set_timeout()
72 outb((0x000000FF & counter), wdt->io_base + NIWD_SEED0); in ni903x_wdd_set_timeout()
81 struct ni903x_wdt *wdt = watchdog_get_drvdata(wdd); in ni903x_wdd_get_timeleft() local
85 control = inb(wdt->io_base + NIWD_CONTROL); in ni903x_wdd_get_timeleft()
[all …]
Dtwl4030_wdt.c30 static int twl4030_wdt_start(struct watchdog_device *wdt) in twl4030_wdt_start() argument
32 return twl4030_wdt_write(wdt->timeout + 1); in twl4030_wdt_start()
35 static int twl4030_wdt_stop(struct watchdog_device *wdt) in twl4030_wdt_stop() argument
40 static int twl4030_wdt_set_timeout(struct watchdog_device *wdt, in twl4030_wdt_set_timeout() argument
43 wdt->timeout = timeout; in twl4030_wdt_set_timeout()
62 struct watchdog_device *wdt; in twl4030_wdt_probe() local
64 wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL); in twl4030_wdt_probe()
65 if (!wdt) in twl4030_wdt_probe()
68 wdt->info = &twl4030_wdt_info; in twl4030_wdt_probe()
69 wdt->ops = &twl4030_wdt_ops; in twl4030_wdt_probe()
[all …]
Dstm32_iwdg.c89 struct stm32_iwdg *wdt = watchdog_get_drvdata(wdd); in stm32_iwdg_start() local
98 presc = DIV_ROUND_UP(tout * wdt->rate, RLR_MAX + 1); in stm32_iwdg_start()
103 iwdg_rlr = ((tout * wdt->rate) / presc) - 1; in stm32_iwdg_start()
106 reg_write(wdt->regs, IWDG_KR, KR_KEY_EWA); in stm32_iwdg_start()
109 reg_write(wdt->regs, IWDG_PR, iwdg_pr); in stm32_iwdg_start()
110 reg_write(wdt->regs, IWDG_RLR, iwdg_rlr); in stm32_iwdg_start()
111 reg_write(wdt->regs, IWDG_KR, KR_KEY_ENABLE); in stm32_iwdg_start()
114 ret = readl_relaxed_poll_timeout(wdt->regs + IWDG_SR, iwdg_sr, in stm32_iwdg_start()
123 reg_write(wdt->regs, IWDG_KR, KR_KEY_RELOAD); in stm32_iwdg_start()
130 struct stm32_iwdg *wdt = watchdog_get_drvdata(wdd); in stm32_iwdg_ping() local
[all …]
/linux-6.1.9/Documentation/devicetree/bindings/watchdog/
Drenesas,wdt.yaml4 $id: http://devicetree.org/schemas/watchdog/renesas,wdt.yaml#
18 - renesas,r7s72100-wdt # RZ/A1
19 - renesas,r7s9210-wdt # RZ/A2
20 - const: renesas,rza-wdt # RZ/A
24 - renesas,r9a06g032-wdt # RZ/N1D
25 - const: renesas,rzn1-wdt # RZ/N1
29 - renesas,r9a07g043-wdt # RZ/G2UL
30 - renesas,r9a07g044-wdt # RZ/G2{L,LC}
31 - renesas,r9a07g054-wdt # RZ/V2L
32 - const: renesas,rzg2l-wdt
[all …]

12345678910>>...20