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Searched refs:wb_info (Results 1 – 9 of 9) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_hwseq.c223 struct dc_writeback_info *wb_info, in dcn30_set_writeback() argument
229 ASSERT(wb_info->dwb_pipe_inst < MAX_DWB_PIPES); in dcn30_set_writeback()
230 ASSERT(wb_info->wb_enabled); in dcn30_set_writeback()
231 ASSERT(wb_info->mpcc_inst >= 0); in dcn30_set_writeback()
232 ASSERT(wb_info->mpcc_inst < dc->res_pool->mpcc_count); in dcn30_set_writeback()
233 mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst]; in dcn30_set_writeback()
234 mcif_buf_params = &wb_info->mcif_buf_params; in dcn30_set_writeback()
238 wb_info->dwb_pipe_inst, wb_info->mpcc_inst); in dcn30_set_writeback()
240 mcif_wb->funcs->config_mcif_buf(mcif_wb, mcif_buf_params, wb_info->dwb_params.dest_height); in dcn30_set_writeback()
241 …mcif_wb->funcs->config_mcif_arb(mcif_wb, &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info-… in dcn30_set_writeback()
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Ddcn30_hwseq.h40 struct dc_writeback_info *wb_info,
44 struct dc_writeback_info *wb_info,
53 struct dc_writeback_info *wb_info);
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddcn30_fpu.c278 struct dc_writeback_info *wb_info = &stream->writeback_info[j]; in dcn30_fpu_populate_dml_writeback_from_context() local
280 if (wb_info->wb_enabled && wb_info->writeback_source_plane && in dcn30_fpu_populate_dml_writeback_from_context()
281 (wb_info->writeback_source_plane == res_ctx->pipe_ctx[i].plane_state)) { in dcn30_fpu_populate_dml_writeback_from_context()
284 dout_wb.wb_src_height = wb_info->dwb_params.cnv_params.crop_en ? in dcn30_fpu_populate_dml_writeback_from_context()
285 wb_info->dwb_params.cnv_params.crop_height : in dcn30_fpu_populate_dml_writeback_from_context()
286 wb_info->dwb_params.cnv_params.src_height; in dcn30_fpu_populate_dml_writeback_from_context()
287 dout_wb.wb_src_width = wb_info->dwb_params.cnv_params.crop_en ? in dcn30_fpu_populate_dml_writeback_from_context()
288 wb_info->dwb_params.cnv_params.crop_width : in dcn30_fpu_populate_dml_writeback_from_context()
289 wb_info->dwb_params.cnv_params.src_width; in dcn30_fpu_populate_dml_writeback_from_context()
290 dout_wb.wb_dst_width = wb_info->dwb_params.dest_width; in dcn30_fpu_populate_dml_writeback_from_context()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/core/
Ddc_stream.c434 struct dc_writeback_info *wb_info) in dc_stream_add_writeback() argument
445 if (wb_info == NULL) { in dc_stream_add_writeback()
450 if (wb_info->dwb_pipe_inst >= MAX_DWB_PIPES) { in dc_stream_add_writeback()
455 wb_info->dwb_params.out_transfer_func = stream->out_transfer_func; in dc_stream_add_writeback()
457 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
465 stream->writeback_info[i].dwb_pipe_inst == wb_info->dwb_pipe_inst) { in dc_stream_add_writeback()
466 stream->writeback_info[i] = *wb_info; in dc_stream_add_writeback()
472 stream->writeback_info[stream->num_wb_info++] = *wb_info; in dc_stream_add_writeback()
477 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
488 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddcn20_fpu.c888 struct dc_writeback_info *wb_info = &res_ctx->pipe_ctx[i].stream->writeback_info[0]; in dcn20_populate_dml_writeback_from_context() local
894 pipes[pipe_cnt].dout.wb_enable = (wb_info->wb_enabled == true) ? 1 : 0; in dcn20_populate_dml_writeback_from_context()
896 pipes[pipe_cnt].dout.wb.wb_src_height = wb_info->dwb_params.cnv_params.crop_height; in dcn20_populate_dml_writeback_from_context()
897 pipes[pipe_cnt].dout.wb.wb_src_width = wb_info->dwb_params.cnv_params.crop_width; in dcn20_populate_dml_writeback_from_context()
898 pipes[pipe_cnt].dout.wb.wb_dst_width = wb_info->dwb_params.dest_width; in dcn20_populate_dml_writeback_from_context()
899 pipes[pipe_cnt].dout.wb.wb_dst_height = wb_info->dwb_params.dest_height; in dcn20_populate_dml_writeback_from_context()
902 pipes[pipe_cnt].dout.wb.wb_htaps_chroma = wb_info->dwb_params.scaler_taps.h_taps_c; in dcn20_populate_dml_writeback_from_context()
903 pipes[pipe_cnt].dout.wb.wb_vtaps_chroma = wb_info->dwb_params.scaler_taps.v_taps_c; in dcn20_populate_dml_writeback_from_context()
906 if (wb_info->dwb_params.out_format == dwb_scaler_mode_yuv420) { in dcn20_populate_dml_writeback_from_context()
907 if (wb_info->dwb_params.output_depth == DWB_OUTPUT_PIXEL_DEPTH_8BPC) in dcn20_populate_dml_writeback_from_context()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/
Dhw_sequencer.h173 struct dc_writeback_info *wb_info,
176 struct dc_writeback_info *wb_info,
183 struct dc_writeback_info *wb_info);
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/
Ddc_stream.h418 struct dc_writeback_info *wb_info);
430 struct dc_writeback_info *wb_info);
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hwseq.h110 struct dc_writeback_info *wb_info,
Ddcn20_hwseq.c2091 struct dc_writeback_info *wb_info, in dcn20_enable_writeback() argument
2098 ASSERT(wb_info->dwb_pipe_inst < MAX_DWB_PIPES); in dcn20_enable_writeback()
2099 ASSERT(wb_info->wb_enabled); in dcn20_enable_writeback()
2100 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn20_enable_writeback()
2101 mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst]; in dcn20_enable_writeback()
2105 optc->funcs->set_dwb_source(optc, wb_info->dwb_pipe_inst); in dcn20_enable_writeback()
2107 …mcif_wb->funcs->config_mcif_buf(mcif_wb, &wb_info->mcif_buf_params, wb_info->dwb_params.dest_heigh… in dcn20_enable_writeback()
2108 …mcif_wb->funcs->config_mcif_arb(mcif_wb, &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info-… in dcn20_enable_writeback()
2112 dwb->funcs->enable(dwb, &wb_info->dwb_params); in dcn20_enable_writeback()