Searched refs:vsync_source (Results 1 – 3 of 3) sorted by relevance
173 reg |= (cfg->vsync_source & 0xf) << pp_offset[pp_idx]; in dpu_hw_setup_vsync_source()177 if (cfg->vsync_source >= DPU_VSYNC_SOURCE_WD_TIMER_4 && in dpu_hw_setup_vsync_source()178 cfg->vsync_source <= DPU_VSYNC_SOURCE_WD_TIMER_0) { in dpu_hw_setup_vsync_source()179 switch (cfg->vsync_source) { in dpu_hw_setup_vsync_source()
67 u32 vsync_source; member
707 vsync_cfg.vsync_source = DPU_VSYNC_SOURCE_WD_TIMER_0; in _dpu_encoder_update_vsync_source()709 vsync_cfg.vsync_source = DPU_VSYNC0_SOURCE_GPIO; in _dpu_encoder_update_vsync_source()