Searched refs:vgpu_cfg_space (Results 1 – 4 of 4) sorted by relevance
72 u8 *cfg_base = vgpu_cfg_space(vgpu); in vgpu_pci_cfg_mem_write()98 pwr = (pci_power_t __force)(*(u16*)(&vgpu_cfg_space(vgpu)[off]) in vgpu_pci_cfg_mem_write()129 memcpy(p_data, vgpu_cfg_space(vgpu) + offset, bytes); in intel_vgpu_emulate_cfg_read()148 u8 old = vgpu_cfg_space(vgpu)[offset]; in emulate_pci_command_write()170 u32 *pval = (u32 *)(vgpu_cfg_space(vgpu) + offset); in emulate_pci_rom_bar_write()188 vgpu_cfg_space(vgpu)[PCI_COMMAND] & PCI_COMMAND_MEMORY; in emulate_pci_bar_write()328 memcpy(vgpu_cfg_space(vgpu), gvt->firmware.cfg_space, in intel_vgpu_init_cfg_space()332 vgpu_cfg_space(vgpu)[PCI_CLASS_DEVICE] = in intel_vgpu_init_cfg_space()334 vgpu_cfg_space(vgpu)[PCI_CLASS_PROG] = in intel_vgpu_init_cfg_space()339 gmch_ctl = (u16 *)(vgpu_cfg_space(vgpu) + INTEL_GVT_PCI_GMCH_CONTROL); in intel_vgpu_init_cfg_space()[all …]
414 control = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_CONTROL(offset)); in inject_virtual_interrupt()415 addr = *(u32 *)(vgpu_cfg_space(vgpu) + MSI_CAP_ADDRESS(offset)); in inject_virtual_interrupt()416 data = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_DATA(offset)); in inject_virtual_interrupt()
110 #define vgpu_cfg_space(vgpu) ((vgpu)->cfg_space.virtual_cfg_space) macro481 pval = (u32 *)(vgpu_cfg_space(vgpu) + offset); in intel_vgpu_write_pci_bar()
443 if ((vgpu_cfg_space(vgpu)[INTEL_GVT_PCI_SWSCI] in intel_vgpu_emulate_opregion_request()