| /linux-6.1.9/drivers/clk/spear/ |
| D | clk-vco-pll.c | 94 for (*index = 0; *index < pll->vco->rtbl_cnt; (*index)++) { in clk_pll_round_rate_index()
97 *prate = pll_calc_rate(pll->vco->rtbl, vco_parent_rate, *index, in clk_pll_round_rate_index()
128 if (pll->vco->lock) in clk_pll_recalc_rate()
129 spin_lock_irqsave(pll->vco->lock, flags); in clk_pll_recalc_rate()
131 p = readl_relaxed(pll->vco->cfg_reg); in clk_pll_recalc_rate()
133 if (pll->vco->lock) in clk_pll_recalc_rate()
134 spin_unlock_irqrestore(pll->vco->lock, flags); in clk_pll_recalc_rate()
145 struct pll_rate_tbl *rtbl = pll->vco->rtbl; in clk_pll_set_rate()
151 if (pll->vco->lock) in clk_pll_set_rate()
152 spin_lock_irqsave(pll->vco->lock, flags); in clk_pll_set_rate()
[all …]
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| D | Makefile | 6 obj-y += clk.o clk-aux-synth.o clk-frac-synth.o clk-gpt-synth.o clk-vco-pll.o
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| /linux-6.1.9/drivers/clk/versatile/ |
| D | clk-icst.c | 63 static int vco_get(struct clk_icst *icst, struct icst_vco *vco) in vco_get() argument
81 vco->v = val & INTEGRATOR_AP_CM_BITS; in vco_get()
82 vco->r = 22; in vco_get()
83 vco->s = 1; in vco_get()
96 vco->v = val & INTEGRATOR_AP_SYS_BITS; in vco_get()
97 vco->r = 46; in vco_get()
98 vco->s = 3; in vco_get()
113 vco->v = divxy ? 17 : 14; in vco_get()
114 vco->r = divxy ? 22 : 14; in vco_get()
115 vco->s = 1; in vco_get()
[all …]
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| D | icst.c | 27 unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco) in icst_hz() argument
29 u64 dividend = p->ref * 2 * (u64)(vco.v + 8); in icst_hz()
30 u32 divisor = (vco.r + 2) * p->s2div[vco.s]; in icst_hz()
49 struct icst_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max }; in icst_hz_to_vco() local
66 return vco; in icst_hz_to_vco()
68 vco.s = p->idx2s[i]; in icst_hz_to_vco()
91 vco.v = vd - 8; in icst_hz_to_vco()
92 vco.r = rd - 2; in icst_hz_to_vco()
99 return vco; in icst_hz_to_vco()
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| D | icst.h | 30 unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco);
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| /linux-6.1.9/drivers/gpu/drm/i915/display/ |
| D | intel_cdclk.c | 270 unsigned int vco; in intel_hpll_vco() local
290 vco = vco_table[tmp & 0x7]; in intel_hpll_vco()
291 if (vco == 0) in intel_hpll_vco()
295 drm_dbg_kms(&dev_priv->drm, "HPLL VCO %u kHz\n", vco); in intel_hpll_vco()
297 return vco; in intel_hpll_vco()
312 cdclk_config->vco = intel_hpll_vco(dev_priv); in g33_get_cdclk()
321 switch (cdclk_config->vco) { in g33_get_cdclk()
338 cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_config->vco, in g33_get_cdclk()
345 cdclk_config->vco, tmp); in g33_get_cdclk()
394 cdclk_config->vco = intel_hpll_vco(dev_priv); in i965gm_get_cdclk()
[all …]
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| D | intel_dpll.c | 30 } dot, vco, n, m, m1, m2, p, p1; member
39 .vco = { .min = 908000, .max = 1512000 },
52 .vco = { .min = 908000, .max = 1512000 },
65 .vco = { .min = 908000, .max = 1512000 },
78 .vco = { .min = 1400000, .max = 2800000 },
91 .vco = { .min = 1400000, .max = 2800000 },
105 .vco = { .min = 1750000, .max = 3500000},
120 .vco = { .min = 1750000, .max = 3500000},
133 .vco = { .min = 1750000, .max = 3500000 },
147 .vco = { .min = 1750000, .max = 3500000 },
[all …]
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| /linux-6.1.9/drivers/clk/berlin/ |
| D | berlin2-avpll.c | 115 struct berlin2_avpll_vco *vco = to_avpll_vco(hw); in berlin2_avpll_vco_is_enabled() local
118 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_is_enabled()
119 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_is_enabled()
127 struct berlin2_avpll_vco *vco = to_avpll_vco(hw); in berlin2_avpll_vco_enable() local
130 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_enable()
131 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_enable()
135 writel_relaxed(reg, vco->base + VCO_CTRL0); in berlin2_avpll_vco_enable()
142 struct berlin2_avpll_vco *vco = to_avpll_vco(hw); in berlin2_avpll_vco_disable() local
145 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_disable()
146 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_disable()
[all …]
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| /linux-6.1.9/drivers/clk/ |
| D | clk-si544.c | 223 u64 vco; in si544_calc_muldiv() local
248 vco = FVCO_MIN + ls_freq - 1; in si544_calc_muldiv()
249 do_div(vco, ls_freq); in si544_calc_muldiv()
250 settings->hs_div = vco; in si544_calc_muldiv()
258 vco = (u64)ls_freq * settings->hs_div; in si544_calc_muldiv()
261 tmp = do_div(vco, FXO); in si544_calc_muldiv()
262 settings->fb_div_int = vco; in si544_calc_muldiv()
265 vco = (u64)tmp << 32; in si544_calc_muldiv()
266 vco += FXO / 2; /* Round to nearest multiple */ in si544_calc_muldiv()
267 do_div(vco, FXO); in si544_calc_muldiv()
[all …]
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| D | clk-lmk04832.c | 257 struct clk_hw vco; member
326 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_is_enabled()
341 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_prepare()
359 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_unprepare()
373 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_recalc_rate()
493 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_round_rate()
517 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_set_rate()
630 lmk->vco.init = &init; in lmk04832_register_vco()
631 return devm_clk_hw_register(lmk->dev, &lmk->vco); in lmk04832_register_vco()
955 parent_names[0] = clk_hw_get_name(&lmk->vco); in lmk04832_register_sclk()
[all …]
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| /linux-6.1.9/drivers/clk/pistachio/ |
| D | clk-pll.c | 199 u64 val, vco, old_postdiv1, old_postdiv2; in pll_gf40lp_frac_set_rate() local
210 vco = params->fref; in pll_gf40lp_frac_set_rate()
211 vco *= (params->fbdiv << 24) + params->frac; in pll_gf40lp_frac_set_rate()
212 vco = div64_u64(vco, params->refdiv << 24); in pll_gf40lp_frac_set_rate()
214 if (vco < MIN_VCO_FRAC_FRAC || vco > MAX_VCO_FRAC_FRAC) in pll_gf40lp_frac_set_rate()
215 pr_warn("%s: VCO %llu is out of range %lu..%lu\n", name, vco, in pll_gf40lp_frac_set_rate()
222 if (val > vco / 16) in pll_gf40lp_frac_set_rate()
224 name, val, vco / 16); in pll_gf40lp_frac_set_rate()
356 u32 val, vco, old_postdiv1, old_postdiv2; in pll_gf40lp_laint_set_rate() local
366 vco = div_u64(params->fref * params->fbdiv, params->refdiv); in pll_gf40lp_laint_set_rate()
[all …]
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| /linux-6.1.9/drivers/clk/analogbits/ |
| D | wrpll-cln28hpc.c | 229 u64 target_vco_rate, delta, best_delta, f_pre_div, vco, vco_pre; in wrpll_configure_for_rate() local
283 vco = vco_pre * f; in wrpll_configure_for_rate()
286 if (vco > target_vco_rate) { in wrpll_configure_for_rate()
288 vco = vco_pre * f; in wrpll_configure_for_rate()
289 } else if (vco < MIN_VCO_FREQ) { in wrpll_configure_for_rate()
291 vco = vco_pre * f; in wrpll_configure_for_rate()
294 delta = abs(target_rate - vco); in wrpll_configure_for_rate()
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| /linux-6.1.9/drivers/video/fbdev/matrox/ |
| D | g450_pll.c | 106 unsigned int *vco, unsigned int fout) in g450_firstpll() argument
114 *vco = vcomax; in g450_firstpll()
116 *vco = fout; in g450_firstpll()
131 *vco = tvco; in g450_firstpll()
133 return g450_nextpll(minfo, pi, vco, 0xFF0000 | p); in g450_firstpll()
437 unsigned int vco; in __g450_setclk() local
440 vco = g450_mnp2vco(minfo, mnp); in __g450_setclk()
441 delta = pll_freq_delta(fout, g450_vco2f(mnp, vco)); in __g450_setclk()
453 && vco != g450_mnp2vco(minfo, mnparray[idx-1]) in __g450_setclk()
454 && vco < (pi->vcomin * 17 / 16)) { in __g450_setclk()
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| /linux-6.1.9/drivers/clk/bcm/ |
| D | clk-iproc-pll.c | 277 struct iproc_pll_vco_param *vco) in pll_fractional_change_only() argument
293 if (ndiv_int != vco->ndiv_int) in pll_fractional_change_only()
299 if (pdiv != vco->pdiv) in pll_fractional_change_only()
305 static int pll_set_rate(struct iproc_clk *clk, struct iproc_pll_vco_param *vco, in pll_set_rate() argument
311 unsigned long rate = vco->rate; in pll_set_rate()
321 if (vco->pdiv == 0) in pll_set_rate()
324 ref_freq = parent_rate / vco->pdiv; in pll_set_rate()
354 if (pll_fractional_change_only(clk->pll, vco)) { in pll_set_rate()
360 val |= vco->ndiv_frac << ctrl->ndiv_frac.shift; in pll_set_rate()
397 val |= vco->ndiv_int << ctrl->ndiv_int.shift; in pll_set_rate()
[all …]
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| /linux-6.1.9/arch/powerpc/boot/ |
| D | 4xx.c | 419 u32 cpu, plb, opb, ebc, vco; in __ibm440eplike_fixup_clocks() local
446 vco = sys_clk * m; in __ibm440eplike_fixup_clocks()
447 clk_a = vco / fwdva; in __ibm440eplike_fixup_clocks()
448 clk_b = vco / fwdvb; in __ibm440eplike_fixup_clocks()
452 vco = 0; in __ibm440eplike_fixup_clocks()
749 u32 cpu, plb, opb, ebc, vco, tb, uart0, uart1; in ibm405ex_fixup_clocks() local
774 vco = (unsigned int)(sys_clk * m); in ibm405ex_fixup_clocks()
778 vco = 0; in ibm405ex_fixup_clocks()
782 cpu = vco / (fwdva * cpudv0); in ibm405ex_fixup_clocks()
784 plb = vco / (fwdva * plb2xdv0 * plbdv0); in ibm405ex_fixup_clocks()
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| /linux-6.1.9/drivers/gpu/drm/gma500/ |
| D | cdv_intel_display.c | 37 .vco = {.min = 1800000, .max = 3600000},
49 .vco = {.min = 1800000, .max = 3600000},
64 .vco = {.min = 1809000, .max = 3564000},
76 .vco = {.min = 1800000, .max = 3600000},
88 .vco = {.min = 1809000, .max = 3564000},
100 .vco = {.min = 1800000, .max = 3600000},
289 if (clock->vco < 2250000) { in cdv_dpll_set_clock_cdv()
292 } else if (clock->vco < 2750000) { in cdv_dpll_set_clock_cdv()
295 } else if (clock->vco < 3300000) { in cdv_dpll_set_clock_cdv()
396 clock->vco = (refclk * clock->m) / clock->n; in cdv_intel_clock()
[all …]
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| D | gma_display.h | 26 int vco; member
41 struct gma_range_t dot, vco, n, m, m1, m2, p, p1; member
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| D | psb_intel_display.c | 26 .vco = {.min = 1400000, .max = 2800000},
38 .vco = {.min = 1400000, .max = 2800000},
69 clock->vco = refclk * clock->m / (clock->n + 2); in psb_intel_clock()
70 clock->dot = clock->vco / clock->p; in psb_intel_clock()
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| /linux-6.1.9/drivers/gpu/drm/mgag200/ |
| D | mgag200_g200er.c | 74 unsigned int computed, vco; in mgag200_g200er_pixpllc_atomic_check() local
89 vco = pllreffreq * (testn + 1) / in mgag200_g200er_pixpllc_atomic_check()
91 if (vco < vcomin) in mgag200_g200er_pixpllc_atomic_check()
93 if (vco > vcomax) in mgag200_g200er_pixpllc_atomic_check()
95 computed = vco / (m_div_val[testm] * (testo + 1)); in mgag200_g200er_pixpllc_atomic_check()
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| /linux-6.1.9/drivers/phy/rockchip/ |
| D | phy-rockchip-inno-hdmi.c | 571 u64 vco; in inno_hdmi_phy_rk3228_clk_recalc_rate() local
577 vco = parent_rate * nf; in inno_hdmi_phy_rk3228_clk_recalc_rate()
580 do_div(vco, nd * 5); in inno_hdmi_phy_rk3228_clk_recalc_rate()
590 do_div(vco, (nd * (no_a == 1 ? no_b : no_a) * no_d * 2)); in inno_hdmi_phy_rk3228_clk_recalc_rate()
593 inno->pixclock = vco; in inno_hdmi_phy_rk3228_clk_recalc_rate()
597 return vco; in inno_hdmi_phy_rk3228_clk_recalc_rate()
718 u64 vco; in inno_hdmi_phy_rk3328_clk_recalc_rate() local
724 vco = parent_rate * nf; in inno_hdmi_phy_rk3328_clk_recalc_rate()
730 vco += DIV_ROUND_CLOSEST(parent_rate * frac, (1 << 24)); in inno_hdmi_phy_rk3328_clk_recalc_rate()
734 do_div(vco, nd * 5); in inno_hdmi_phy_rk3328_clk_recalc_rate()
[all …]
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| /linux-6.1.9/drivers/clk/mediatek/ |
| D | clk-pll.c | 73 u64 vco; in __mtk_pll_recalc_rate() local
81 vco = (u64)fin * pcw; in __mtk_pll_recalc_rate()
83 if (pcwfbits && (vco & GENMASK(pcwfbits - 1, 0))) in __mtk_pll_recalc_rate()
86 vco >>= pcwfbits; in __mtk_pll_recalc_rate()
89 vco++; in __mtk_pll_recalc_rate()
91 return ((unsigned long)vco + postdiv - 1) / postdiv; in __mtk_pll_recalc_rate()
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| /linux-6.1.9/drivers/media/i2c/ |
| D | mt9t112.c | 278 u32 vco, clk; in mt9t112_clock_info() local
307 vco = 2 * m * ext / (n + 1); in mt9t112_clock_info()
308 enable = ((vco < 384000) || (vco > 768000)) ? "X" : ""; in mt9t112_clock_info()
309 dev_dbg(&client->dev, "VCO : %10u K %s\n", vco, enable); in mt9t112_clock_info()
311 clk = vco / (p1 + 1) / (p2 + 1); in mt9t112_clock_info()
315 clk = vco / (p3 + 1); in mt9t112_clock_info()
319 clk = vco / (p6 + 1); in mt9t112_clock_info()
323 clk = vco / (p5 + 1); in mt9t112_clock_info()
327 clk = vco / (p4 + 1); in mt9t112_clock_info()
331 clk = vco / (p7 + 1); in mt9t112_clock_info()
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| /linux-6.1.9/arch/arm/boot/dts/ |
| D | arm-realview-eb.dtsi | 277 vco-offset = <0x0C>;
285 vco-offset = <0x10>;
293 vco-offset = <0x14>;
301 vco-offset = <0x18>;
309 vco-offset = <0x1c>;
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| D | integratorap.dts | 96 vco-offset = <0x08>;
106 vco-offset = <0x1c>;
127 vco-offset = <0x04>;
137 vco-offset = <0x04>;
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| D | arm-realview-pb11mp.dts | 386 vco-offset = <0x0C>;
394 vco-offset = <0x10>;
402 vco-offset = <0x14>;
410 vco-offset = <0x18>;
418 vco-offset = <0x1c>;
426 vco-offset = <0xd4>;
434 vco-offset = <0xd8>;
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