Searched refs:vce_states (Results 1 – 13 of 13) sorted by relevance
469 adev->pm.dpm.vce_states[i].evclk = in amdgpu_parse_extended_power_table()471 adev->pm.dpm.vce_states[i].ecclk = in amdgpu_parse_extended_power_table()473 adev->pm.dpm.vce_states[i].clk_idx = in amdgpu_parse_extended_power_table()475 adev->pm.dpm.vce_states[i].pstate = in amdgpu_parse_extended_power_table()815 return &adev->pm.dpm.vce_states[idx]; in amdgpu_get_vce_clock_state()
2224 new_rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in kv_apply_state_adjust_rules()2225 new_rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; in kv_apply_state_adjust_rules()2251 if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk) in kv_apply_state_adjust_rules()2252 sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk; in kv_apply_state_adjust_rules()2782 clock_array_index = adev->pm.dpm.vce_states[i].clk_idx; in kv_parse_power_table()2787 adev->pm.dpm.vce_states[i].sclk = sclk; in kv_parse_power_table()2788 adev->pm.dpm.vce_states[i].mclk = 0; in kv_parse_power_table()
3461 rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in si_apply_state_adjust_rules()3462 rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; in si_apply_state_adjust_rules()3551 if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk) in si_apply_state_adjust_rules()3552 sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk; in si_apply_state_adjust_rules()3553 if (mclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk) in si_apply_state_adjust_rules()3554 mclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk; in si_apply_state_adjust_rules()7336 clock_array_index = adev->pm.dpm.vce_states[i].clk_idx; in si_parse_power_table()7343 adev->pm.dpm.vce_states[i].sclk = sclk; in si_parse_power_table()7344 adev->pm.dpm.vce_states[i].mclk = mclk; in si_parse_power_table()
1511 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in trinity_apply_state_adjust_rules()1512 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in trinity_apply_state_adjust_rules()1529 if (ps->levels[i].sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in trinity_apply_state_adjust_rules()1530 ps->levels[i].sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in trinity_apply_state_adjust_rules()1763 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; in trinity_parse_power_table()1768 rdev->pm.dpm.vce_states[i].sclk = sclk; in trinity_parse_power_table()1769 rdev->pm.dpm.vce_states[i].mclk = 0; in trinity_parse_power_table()
1952 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in kv_apply_state_adjust_rules()1953 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in kv_apply_state_adjust_rules()1979 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in kv_apply_state_adjust_rules()1980 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in kv_apply_state_adjust_rules()2507 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; in kv_parse_power_table()2512 rdev->pm.dpm.vce_states[i].sclk = sclk; in kv_parse_power_table()2513 rdev->pm.dpm.vce_states[i].mclk = 0; in kv_parse_power_table()
1122 rdev->pm.dpm.vce_states[i].evclk = in r600_parse_extended_power_table()1124 rdev->pm.dpm.vce_states[i].ecclk = in r600_parse_extended_power_table()1126 rdev->pm.dpm.vce_states[i].clk_idx = in r600_parse_extended_power_table()1128 rdev->pm.dpm.vce_states[i].pstate = in r600_parse_extended_power_table()
2988 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in si_apply_state_adjust_rules()2989 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in si_apply_state_adjust_rules()3078 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in si_apply_state_adjust_rules()3079 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in si_apply_state_adjust_rules()3080 if (mclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk) in si_apply_state_adjust_rules()3081 mclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk; in si_apply_state_adjust_rules()6866 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; in si_parse_power_table()6873 rdev->pm.dpm.vce_states[i].sclk = sclk; in si_parse_power_table()6874 rdev->pm.dpm.vce_states[i].mclk = mclk; in si_parse_power_table()
781 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in ci_apply_state_adjust_rules()782 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in ci_apply_state_adjust_rules()824 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in ci_apply_state_adjust_rules()825 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in ci_apply_state_adjust_rules()826 if (mclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk) in ci_apply_state_adjust_rules()827 mclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk; in ci_apply_state_adjust_rules()5581 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; in ci_parse_power_table()5588 rdev->pm.dpm.vce_states[i].sclk = sclk; in ci_parse_power_table()5589 rdev->pm.dpm.vce_states[i].mclk = mclk; in ci_parse_power_table()
1582 struct radeon_vce_state vce_states[RADEON_MAX_VCE_LEVELS]; member
250 struct amd_vce_state vce_states[AMD_MAX_VCE_LEVELS]; member
763 struct amd_vce_state vce_states[AMD_MAX_VCE_LEVELS]; member
797 return &hwmgr->vce_states[idx]; in pp_dpm_get_vce_clock_state()
1414 ppt_get_vce_state_table_entry_v1_0(hwmgr, j, &(hwmgr->vce_states[j]), NULL, &flags); in get_powerplay_table_entry_v1_0()