| /linux-6.1.9/drivers/pci/controller/ |
| D | pci-v3-semi.c | 315 struct v3_pci *v3 = bus->sysdata; in v3_map_bus() local
367 writel(v3_addr_to_lb_base(v3->non_pre_mem) | in v3_map_bus()
369 v3->base + V3_LB_BASE0); in v3_map_bus()
375 writel(v3_addr_to_lb_base(v3->config_mem) | in v3_map_bus()
377 v3->base + V3_LB_BASE1); in v3_map_bus()
378 writew(mapaddress, v3->base + V3_LB_MAP1); in v3_map_bus()
380 return v3->config_base + address + offset; in v3_map_bus()
383 static void v3_unmap_bus(struct v3_pci *v3) in v3_unmap_bus() argument
388 writel(v3_addr_to_lb_base(v3->pre_mem) | in v3_unmap_bus()
391 v3->base + V3_LB_BASE1); in v3_unmap_bus()
[all …]
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| /linux-6.1.9/lib/ |
| D | siphash.c | 20 #define SIPROUND SIPHASH_PERMUTATION(v0, v1, v2, v3)
26 u64 v3 = SIPHASH_CONST_3; \
28 v3 ^= key->key[1]; \
34 v3 ^= b; \
43 return (v0 ^ v1) ^ (v2 ^ v3);
54 v3 ^= m; in __siphash_aligned()
87 v3 ^= m; in __siphash_unaligned()
119 v3 ^= first; in siphash_1u64()
136 v3 ^= first; in siphash_2u64()
140 v3 ^= second; in siphash_2u64()
[all …]
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| D | xxhash.c | 112 uint32_t v3 = seed + 0; in xxh32() local
120 v3 = xxh32_round(v3, get_unaligned_le32(p)); in xxh32()
127 xxh_rotl32(v3, 12) + xxh_rotl32(v4, 18); in xxh32()
182 uint64_t v3 = seed + 0; in xxh64() local
190 v3 = xxh64_round(v3, get_unaligned_le64(p)); in xxh64()
197 xxh_rotl64(v3, 12) + xxh_rotl64(v4, 18); in xxh64()
200 h64 = xxh64_merge_round(h64, v3); in xxh64()
250 state.v3 = seed + 0; in xxh32_reset()
264 state.v3 = seed + 0; in xxh64_reset()
297 state->v3 = xxh32_round(state->v3, get_unaligned_le32(p32)); in xxh32_update()
[all …]
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| /linux-6.1.9/arch/arm64/lib/ |
| D | xor-neon.c | 19 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_2() local
27 v3 = veorq_u64(vld1q_u64(dp1 + 6), vld1q_u64(dp2 + 6)); in xor_arm64_neon_2()
33 vst1q_u64(dp1 + 6, v3); in xor_arm64_neon_2()
48 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_3() local
56 v3 = veorq_u64(vld1q_u64(dp1 + 6), vld1q_u64(dp2 + 6)); in xor_arm64_neon_3()
62 v3 = veorq_u64(v3, vld1q_u64(dp3 + 6)); in xor_arm64_neon_3()
68 vst1q_u64(dp1 + 6, v3); in xor_arm64_neon_3()
86 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_4() local
94 v3 = veorq_u64(vld1q_u64(dp1 + 6), vld1q_u64(dp2 + 6)); in xor_arm64_neon_4()
100 v3 = veorq_u64(v3, vld1q_u64(dp3 + 6)); in xor_arm64_neon_4()
[all …]
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| /linux-6.1.9/drivers/char/mwave/ |
| D | mwavedd.h | 89 #define PRINTK_4(f,s,v1,v2,v3) \ argument
91 printk(s,v1,v2,v3); \
94 #define PRINTK_5(f,s,v1,v2,v3,v4) \ argument
96 printk(s,v1,v2,v3,v4); \
99 #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \ argument
101 printk(s,v1,v2,v3,v4,v5); \
104 #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) \ argument
106 printk(s,v1,v2,v3,v4,v5,v6); \
109 #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) \ argument
111 printk(s,v1,v2,v3,v4,v5,v6,v7); \
[all …]
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| /linux-6.1.9/arch/s390/include/asm/ |
| D | vx-insn.h | 100 .ifc \vxr,%v3
200 .macro RXB rxb v1 v2=0 v3=0 v4=0
208 .if \v3 & 0x10
224 .macro MRXB m v1 v2=0 v3=0 v4=0
226 RXB rxb, \v1, \v2, \v3, \v4
239 .macro MRXBOPC m opc v1 v2=0 v3=0 v4=0
240 MRXB \m, \v1, \v2, \v3, \v4
347 VX_NUM v3, \vr
348 .word 0xE700 | (r1 << 4) | (v3&15)
350 MRXBOPC \m, 0x21, v3
[all …]
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| /linux-6.1.9/arch/powerpc/lib/ |
| D | xor_vmx.c | 78 DEFINE(v3); in __xor_altivec_3()
84 LOAD(v3); in __xor_altivec_3()
86 XOR(v1, v3); in __xor_altivec_3()
91 v3 += 4; in __xor_altivec_3()
103 DEFINE(v3); in __xor_altivec_4()
110 LOAD(v3); in __xor_altivec_4()
113 XOR(v3, v4); in __xor_altivec_4()
114 XOR(v1, v3); in __xor_altivec_4()
119 v3 += 4; in __xor_altivec_4()
133 DEFINE(v3); in __xor_altivec_5()
[all …]
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| /linux-6.1.9/include/pcmcia/ |
| D | device_id.h | 34 #define PCMCIA_DEVICE_PROD_ID3(v3, vh3) { \ argument
36 .prod_id = { NULL, NULL, (v3), NULL }, \
45 #define PCMCIA_DEVICE_PROD_ID13(v1, v3, vh1, vh3) { \ argument
48 .prod_id = { (v1), NULL, (v3), NULL }, \
57 #define PCMCIA_DEVICE_PROD_ID123(v1, v2, v3, vh1, vh2, vh3) { \ argument
61 .prod_id = { (v1), (v2), (v3), NULL },\
71 #define PCMCIA_DEVICE_PROD_ID134(v1, v3, v4, vh1, vh3, vh4) { \ argument
75 .prod_id = { (v1), NULL, (v3), (v4) }, \
78 #define PCMCIA_DEVICE_PROD_ID1234(v1, v2, v3, v4, vh1, vh2, vh3, vh4) { \ argument
83 .prod_id = { (v1), (v2), (v3), (v4) }, \
[all …]
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| /linux-6.1.9/arch/arm64/crypto/ |
| D | sm3-ce-core.S | 89 0: ld1 {v0.16b-v3.16b}, [x1], #64
98 CPU_LE( rev32 v3.16b, v3.16b )
102 qround a, v0, v1, v2, v3, v4
103 qround a, v1, v2, v3, v4, v0
104 qround a, v2, v3, v4, v0, v1
105 qround a, v3, v4, v0, v1, v2
109 qround b, v4, v0, v1, v2, v3
110 qround b, v0, v1, v2, v3, v4
111 qround b, v1, v2, v3, v4, v0
112 qround b, v2, v3, v4, v0, v1
[all …]
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| D | aes-modes.S | 26 encrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7
31 decrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7
37 encrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7
42 decrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7
63 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 pt blocks */
67 st1 {v0.16b-v3.16b}, [x0], #64
94 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 ct blocks */
98 st1 {v0.16b-v3.16b}, [x0], #64
145 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 pt blocks */
152 eor v3.16b, v3.16b, v2.16b
[all …]
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| D | chacha-neon-core.S | 47 eor v3.16b, v3.16b, v0.16b
48 rev32 v3.8h, v3.8h
51 add v2.4s, v2.4s, v3.4s
58 eor v3.16b, v3.16b, v0.16b
59 tbl v3.16b, {v3.16b}, v12.16b
62 add v2.4s, v2.4s, v3.4s
72 ext v3.16b, v3.16b, v3.16b, #12
76 eor v3.16b, v3.16b, v0.16b
77 rev32 v3.8h, v3.8h
80 add v2.4s, v2.4s, v3.4s
[all …]
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| D | aes-ce-core.S | 18 mov v3.16b, v1.16b
21 ld1 {v3.4s}, [x0], #16
25 aese v0.16b, v3.16b
31 ld1 {v3.4s}, [x0], #16
34 eor v0.16b, v0.16b, v3.16b
46 mov v3.16b, v1.16b
49 ld1 {v3.4s}, [x0], #16
53 aesd v0.16b, v3.16b
59 ld1 {v3.4s}, [x0], #16
62 eor v0.16b, v0.16b, v3.16b
|
| D | sm4-ce-core.S | 228 sm4ekey v3.4s, v2.4s, v27.4s;
229 sm4ekey v4.4s, v3.4s, v28.4s;
234 st1 {v0.16b-v3.16b}, [x1], #64;
240 rev64 v3.4s, v3.4s;
248 ext v3.16b, v3.16b, v3.16b, #8;
256 st1 {v3.16b}, [x2], #16;
294 ld1 {v0.16b-v3.16b}, [x2], #64;
297 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7);
299 st1 {v0.16b-v3.16b}, [x1], #64;
312 ld1 {v0.16b-v3.16b}, [x2], #64;
[all …]
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| D | aes-ce-ccm-core.S | 31 1: ld1 {v3.4s}, [x4] /* load first round key */
38 mov v5.16b, v3.16b
40 2: mov v4.16b, v3.16b
44 4: ld1 {v3.4s}, [x6], #16 /* load next round key */
49 aese v0.16b, v3.16b
90 ld1 {v3.4s}, [x2], #16 /* load first round key */
97 mov v5.16b, v3.16b
99 0: mov v4.16b, v3.16b
105 2: ld1 {v3.4s}, [x2], #16 /* load next round key */
112 aese v0.16b, v3.16b
[all …]
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| D | sm4-neon-core.S | 231 mov v3.16b, v0.16b;
239 ld1 {v3.16b}, [x2];
242 SM4_CRYPT_BLK4(v0, v1, v2, v3);
252 st1 {v3.16b}, [x1];
271 ld1 {v0.16b-v3.16b}, [x2], #64;
285 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7);
288 st1 {v0.16b-v3.16b}, [x1], #64;
316 ld1 {v0.16b-v3.16b}, [x2], #64;
319 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7);
321 st1 {v0.16b-v3.16b}, [x1], #64;
[all …]
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/ |
| D | reg_helper.h | 72 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
76 FN(reg, f3), v3)
78 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
82 FN(reg, f3), v3,\
85 #define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
90 FN(reg, f3), v3,\
94 #define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
99 FN(reg, f3), v3,\
104 #define REG_SET_7(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
109 FN(reg, f3), v3,\
[all …]
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| /linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
| D | atombios_crtc.c | 238 ENABLE_SPREAD_SPECTRUM_ON_PPLL_V3 v3; member
278 args.v3.usSpreadSpectrumAmountFrac = cpu_to_le16(0); in amdgpu_atombios_crtc_program_ss()
279 args.v3.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; in amdgpu_atombios_crtc_program_ss()
282 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P1PLL; in amdgpu_atombios_crtc_program_ss()
285 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P2PLL; in amdgpu_atombios_crtc_program_ss()
288 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_DCPLL; in amdgpu_atombios_crtc_program_ss()
293 args.v3.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); in amdgpu_atombios_crtc_program_ss()
294 args.v3.usSpreadSpectrumStep = cpu_to_le16(ss->step); in amdgpu_atombios_crtc_program_ss()
295 args.v3.ucEnable = enable; in amdgpu_atombios_crtc_program_ss()
302 ADJUST_DISPLAY_PLL_PS_ALLOCATION_V3 v3; member
[all …]
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| D | atombios_encoders.c | 555 DIG_ENCODER_CONTROL_PARAMETERS_V3 v3; member
602 args.v3.ucPanelMode = panel_mode; in amdgpu_atombios_encoder_setup_dig_encoder()
634 args.v3.ucAction = action; in amdgpu_atombios_encoder_setup_dig_encoder()
635 args.v3.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_encoder()
637 args.v3.ucPanelMode = panel_mode; in amdgpu_atombios_encoder_setup_dig_encoder()
639 args.v3.ucEncoderMode = amdgpu_atombios_encoder_get_encoder_mode(encoder); in amdgpu_atombios_encoder_setup_dig_encoder()
641 if (ENCODER_MODE_IS_DP(args.v3.ucEncoderMode)) in amdgpu_atombios_encoder_setup_dig_encoder()
642 args.v3.ucLaneNum = dp_lane_count; in amdgpu_atombios_encoder_setup_dig_encoder()
644 args.v3.ucLaneNum = 8; in amdgpu_atombios_encoder_setup_dig_encoder()
646 args.v3.ucLaneNum = 4; in amdgpu_atombios_encoder_setup_dig_encoder()
[all …]
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| /linux-6.1.9/tools/power/cpupower/debug/kernel/ |
| D | cpufreq-test_tsc.c | 37 u32 v1=0,v2=0,v3=0; in read_pmtmr() local
46 v3 = inl(pm_tmr_ioport); in read_pmtmr()
47 } while ((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1) in read_pmtmr()
48 || (v3 > v1 && v3 < v2)); in read_pmtmr()
|
| /linux-6.1.9/Documentation/hwmon/ |
| D | peci-dimmtemp.rst | 8 * Intel Xeon E5/E7 v3 server processors
9 Intel Xeon E5-14xx v3 family
10 Intel Xeon E5-24xx v3 family
11 Intel Xeon E5-16xx v3 family
12 Intel Xeon E5-26xx v3 family
13 Intel Xeon E5-46xx v3 family
14 Intel Xeon E7-48xx v3 family
15 Intel Xeon E7-88xx v3 family
|
| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| D | dcn_calc_math.c | 94 float dcn_bw_max3(float v1, float v2, float v3) in dcn_bw_max3() argument
96 return v3 > dcn_bw_max2(v1, v2) ? v3 : dcn_bw_max2(v1, v2); in dcn_bw_max3()
99 float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5) in dcn_bw_max5() argument
101 …return dcn_bw_max3(v1, v2, v3) > dcn_bw_max2(v4, v5) ? dcn_bw_max3(v1, v2, v3) : dcn_bw_max2(v4, v… in dcn_bw_max5()
|
| /linux-6.1.9/arch/arm64/boot/dts/freescale/ |
| D | qoriq-fman3-0.dtsi | 3 * QorIQ FMan v3 device tree
33 compatible = "fsl,fman-v3-port-oh";
39 compatible = "fsl,fman-v3-port-oh";
45 compatible = "fsl,fman-v3-port-oh";
51 compatible = "fsl,fman-v3-port-oh";
57 compatible = "fsl,fman-v3-port-oh";
63 compatible = "fsl,fman-v3-port-oh";
|
| /linux-6.1.9/drivers/gpu/drm/amd/display/dmub/src/ |
| D | dmub_reg.h | 70 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
74 FN(reg, f3), v3)
76 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
80 FN(reg, f3), v3, \
97 #define REG_UPDATE_3(reg, f1, v1, f2, v2, f3, v3) \ argument
101 FN(reg, f3), v3)
103 #define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
107 FN(reg, f3), v3, \
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| /linux-6.1.9/arch/arm64/boot/dts/amazon/ |
| D | alpine-v3-evp.dts | 6 #include "alpine-v3.dtsi"
9 model = "Amazon's Annapurna Labs Alpine v3 Evaluation Platform (EVP)";
10 compatible = "amazon,al-alpine-v3-evp", "amazon,al-alpine-v3";
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| /linux-6.1.9/drivers/clocksource/ |
| D | acpi_pm.c | 42 u32 v1 = 0, v2 = 0, v3 = 0; in acpi_pm_read_verified() local
53 v3 = read_pmtmr(); in acpi_pm_read_verified()
54 } while (unlikely((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1) in acpi_pm_read_verified()
55 || (v3 > v1 && v3 < v2))); in acpi_pm_read_verified()
|