Searched refs:uhs (Results 1 – 25 of 138) sorted by relevance
123456
/linux-6.1.9/arch/riscv/boot/dts/microchip/ |
D | mpfs-polarberry.dts | 75 sd-uhs-sdr12; 76 sd-uhs-sdr25; 77 sd-uhs-sdr50; 78 sd-uhs-sdr104;
|
D | mpfs-sev-kit.dts | 108 sd-uhs-sdr12; 109 sd-uhs-sdr25; 110 sd-uhs-sdr50; 111 sd-uhs-sdr104;
|
D | mpfs-icicle-kit.dts | 117 sd-uhs-sdr12; 118 sd-uhs-sdr25; 119 sd-uhs-sdr50; 120 sd-uhs-sdr104;
|
D | mpfs-m100pfsevp.dts | 124 sd-uhs-sdr12; 125 sd-uhs-sdr25; 126 sd-uhs-sdr50; 127 sd-uhs-sdr104;
|
/linux-6.1.9/arch/arm64/boot/dts/freescale/ |
D | fsl-ls1012a-rdb.dts | 29 sd-uhs-sdr104; 30 sd-uhs-sdr50; 31 sd-uhs-sdr25; 32 sd-uhs-sdr12;
|
D | fsl-lx2160a-clearfog-itx.dtsi | 92 sd-uhs-sdr104; 93 sd-uhs-sdr50; 94 sd-uhs-sdr25; 95 sd-uhs-sdr12;
|
D | fsl-ls1046a-rdb.dts | 41 sd-uhs-sdr104; 42 sd-uhs-sdr50; 43 sd-uhs-sdr25; 44 sd-uhs-sdr12;
|
D | fsl-lx2160a-rdb.dts | 130 sd-uhs-sdr104; 131 sd-uhs-sdr50; 132 sd-uhs-sdr25; 133 sd-uhs-sdr12;
|
D | fsl-ls1028a-kontron-sl28.dts | 99 sd-uhs-sdr104; 100 sd-uhs-sdr50; 101 sd-uhs-sdr25; 102 sd-uhs-sdr12;
|
D | fsl-ls1028a-rdb.dts | 162 sd-uhs-sdr104; 163 sd-uhs-sdr50; 164 sd-uhs-sdr25; 165 sd-uhs-sdr12;
|
D | fsl-lx2162a-qds.dts | 237 sd-uhs-sdr104; 238 sd-uhs-sdr50; 239 sd-uhs-sdr25; 240 sd-uhs-sdr12;
|
/linux-6.1.9/arch/arm/boot/dts/ |
D | rk3288-veyron-sdmmc.dtsi | 83 sd-uhs-sdr12; 84 sd-uhs-sdr25; 85 sd-uhs-sdr50; 86 sd-uhs-sdr104;
|
D | stih410-b2120.dts | 39 sd-uhs-sdr50; 40 sd-uhs-sdr104; 41 sd-uhs-ddr50;
|
D | stih418-b2199.dts | 92 sd-uhs-sdr50; 93 sd-uhs-sdr104; 94 sd-uhs-ddr50;
|
D | rk3288-phycore-rdk.dts | 231 sd-uhs-sdr12; 232 sd-uhs-sdr25; 233 sd-uhs-sdr50; 234 sd-uhs-sdr104;
|
/linux-6.1.9/Documentation/devicetree/bindings/mmc/ |
D | socionext,uniphier-sd.yaml | 94 pinctrl-names = "default", "uhs"; 104 sd-uhs-sdr12; 105 sd-uhs-sdr25; 106 sd-uhs-sdr50;
|
D | sdhci-st.txt | 51 - sd-uhs-sdr50: To enable the SDR50 in the mmcss. 54 - sd-uhs-sdr104: To enable the SDR104 in the mmcss. 57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss. 107 sd-uhs-sdr50; 108 sd-uhs-sdr104; 109 sd-uhs-ddr50;
|
D | sdhci-sprd.txt | 24 - pinctrl-1: should contain uhs mode pin control 35 - sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing. 36 - sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing. 60 sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>;
|
D | brcm,sdhci-brcmstb.yaml | 93 sd-uhs-sdr50; 94 sd-uhs-ddr50; 95 sd-uhs-sdr104;
|
D | cdns,sdhci.yaml | 49 cdns,phy-input-delay-sd-uhs-sdr12: 55 cdns,phy-input-delay-sd-uhs-sdr25: 61 cdns,phy-input-delay-sd-uhs-sdr50: 67 cdns,phy-input-delay-sd-uhs-ddr50:
|
/linux-6.1.9/drivers/mmc/host/ |
D | sdhci-pxav3.c | 240 static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs) in pxav3_set_uhs_signaling() argument 254 switch (uhs) { in pxav3_set_uhs_signaling() 280 if (uhs == MMC_TIMING_UHS_SDR50 || in pxav3_set_uhs_signaling() 281 uhs == MMC_TIMING_UHS_DDR50) { in pxav3_set_uhs_signaling() 284 } else if (uhs == MMC_TIMING_MMC_HS) { in pxav3_set_uhs_signaling() 297 __func__, uhs, ctrl_2); in pxav3_set_uhs_signaling()
|
/linux-6.1.9/arch/arm64/boot/dts/amlogic/ |
D | meson-gxl-s905x-libretech-cc-v2.dts | 248 sd-uhs-sdr12; 249 sd-uhs-sdr25; 250 sd-uhs-sdr50; 251 sd-uhs-ddr50;
|
D | meson-gxbb-p20x.dtsi | 196 sd-uhs-sdr12; 197 sd-uhs-sdr25; 198 sd-uhs-sdr50;
|
/linux-6.1.9/arch/arm64/boot/dts/rockchip/ |
D | rk3308-roc-cc.dts | 181 sd-uhs-sdr25; 182 sd-uhs-sdr50; 183 sd-uhs-sdr104;
|
/linux-6.1.9/arch/arm64/boot/dts/mediatek/ |
D | mt8183-pumpkin.dts | 167 sd-uhs-sdr50; 168 sd-uhs-sdr104; 279 mmc0_pins_uhs: mmc0-pins-uhs { 337 mmc1_pins_uhs: mmc1-pins-uhs {
|
123456