Searched refs:uctrl (Results 1 – 15 of 15) sorted by relevance
169 if (udev->uctrl) { in __qedi_free_uio_rings()170 free_page((unsigned long)udev->uctrl); in __qedi_free_uio_rings()171 udev->uctrl = NULL; in __qedi_free_uio_rings()207 struct qedi_uio_ctrl *uctrl = NULL; in qedi_reset_uio_rings() local210 uctrl = udev->uctrl; in qedi_reset_uio_rings()213 uctrl->host_rx_cons = 0; in qedi_reset_uio_rings()214 uctrl->hw_rx_prod = 0; in qedi_reset_uio_rings()215 uctrl->hw_rx_bd_prod = 0; in qedi_reset_uio_rings()216 uctrl->host_rx_bd_cons = 0; in qedi_reset_uio_rings()231 udev->uctrl = (void *)get_zeroed_page(GFP_KERNEL); in __qedi_alloc_uio_rings()[all …]
1220 struct qedi_uio_ctrl *uctrl; in qedi_data_avail() local1231 uctrl = (struct qedi_uio_ctrl *)udev->uctrl; in qedi_data_avail()1232 if (!uctrl) { in qedi_data_avail()1237 len = uctrl->host_tx_pkt_len; in qedi_data_avail()1263 uctrl->host_tx_pkt_len = 0; in qedi_data_avail()1264 uctrl->hw_tx_cons++; in qedi_data_avail()
133 void *uctrl; member
17 obj-$(CONFIG_TADPOLE_TS102_UCTRL) += uctrl.o
352 int cs42l42_volume_get(struct snd_kcontrol *kctrl, struct snd_ctl_elem_value *uctrl);353 int cs42l42_volume_put(struct snd_kcontrol *kctrl, struct snd_ctl_elem_value *uctrl);
484 int cs42l42_volume_get(struct snd_kcontrol *kctrl, struct snd_ctl_elem_value *uctrl) in cs42l42_volume_get() argument491 long *valp = uctrl->value.integer.value; in cs42l42_volume_get()543 int cs42l42_volume_put(struct snd_kcontrol *kctrl, struct snd_ctl_elem_value *uctrl) in cs42l42_volume_put() argument550 long *valp = uctrl->value.integer.value; in cs42l42_volume_put()
38 struct mlx5_wqe_umr_ctrl_seg uctrl; member
80 struct mlx5_wqe_umr_ctrl_seg *ucseg = &wqe->uctrl; in mlx5e_ktls_build_static_params()
86 struct snd_ctl_elem_value *uctrl) in cs4234_dac14_grp_delay_put() argument110 ret = snd_soc_put_enum_double(kctrl, uctrl); in cs4234_dac14_grp_delay_put()
119 umr_wqe->uctrl.xlt_offset = cpu_to_be16(offset); in mlx5e_xsk_alloc_rx_mpwqe()
525 umr_wqe->uctrl.flags = MLX5_UMR_TRANSLATION_OFFSET_EN | MLX5_UMR_INLINE; in build_klm_umr()526 umr_wqe->uctrl.xlt_offset = cpu_to_be16(offset); in build_klm_umr()527 umr_wqe->uctrl.xlt_octowords = cpu_to_be16(klm_len); in build_klm_umr()528 umr_wqe->uctrl.mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); in build_klm_umr()687 umr_wqe->uctrl.xlt_offset = cpu_to_be16(offset); in mlx5e_alloc_rx_mpwqe()
255 struct mlx5_wqe_umr_ctrl_seg uctrl; member
221 struct mlx5_wqe_umr_ctrl_seg *ucseg = &wqe->uctrl; in mlx5e_build_umr_wqe()
426 u32 uctrl) in ptrace_hbp_set_ctrl() argument440 decode_ctrl_reg(uctrl, &ctrl); in ptrace_hbp_set_ctrl()
311 174 = /dev/uctrl SPARCbook 3 microcontroller