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Searched refs:total_dcn_read_bw_with_flip (Results 1 – 8 of 8) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_mode_vba_31.c2862 v->total_dcn_read_bw_with_flip = 0.0;
2865 v->total_dcn_read_bw_with_flip = v->total_dcn_read_bw_with_flip
2889 if (v->total_dcn_read_bw_with_flip > v->ReturnBW) {
2891 …otal_dcn_read_bw_with_flip %f (bw w/ flip too high!)\n", __func__, v->total_dcn_read_bw_with_flip);
2894 v->total_dcn_read_bw_with_flip = MaxTotalRDBandwidth;
5196 v->total_dcn_read_bw_with_flip = 0.0;
5198 v->total_dcn_read_bw_with_flip = v->total_dcn_read_bw_with_flip
5212 if (v->total_dcn_read_bw_with_flip > v->ReturnBWPerState[i][j]) {
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_mode_vba_20.c2238 double total_dcn_read_bw_with_flip = 0; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local
2299 total_dcn_read_bw_with_flip = in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2300 total_dcn_read_bw_with_flip in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2313 if (total_dcn_read_bw_with_flip > mode_lib->vba.ReturnBW) { in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4896 mode_lib->vba.total_dcn_read_bw_with_flip = 0.0; in dml20_ModeSupportAndSystemConfigurationFull()
4898 mode_lib->vba.total_dcn_read_bw_with_flip = in dml20_ModeSupportAndSystemConfigurationFull()
4899 mode_lib->vba.total_dcn_read_bw_with_flip in dml20_ModeSupportAndSystemConfigurationFull()
4910 if (mode_lib->vba.total_dcn_read_bw_with_flip in dml20_ModeSupportAndSystemConfigurationFull()
Ddisplay_mode_vba_20v2.c2272 double total_dcn_read_bw_with_flip = 0; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local
2333 total_dcn_read_bw_with_flip = in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2334 total_dcn_read_bw_with_flip in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2347 if (total_dcn_read_bw_with_flip > mode_lib->vba.ReturnBW) { in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5019 mode_lib->vba.total_dcn_read_bw_with_flip = 0.0; in dml20v2_ModeSupportAndSystemConfigurationFull()
5021 mode_lib->vba.total_dcn_read_bw_with_flip = in dml20v2_ModeSupportAndSystemConfigurationFull()
5022 mode_lib->vba.total_dcn_read_bw_with_flip in dml20v2_ModeSupportAndSystemConfigurationFull()
5033 if (mode_lib->vba.total_dcn_read_bw_with_flip in dml20v2_ModeSupportAndSystemConfigurationFull()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_mode_vba_30.c2688 v->total_dcn_read_bw_with_flip = 0.0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2691 v->total_dcn_read_bw_with_flip = v->total_dcn_read_bw_with_flip + dml_max3( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2711 if (v->total_dcn_read_bw_with_flip > v->ReturnBW) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2713 v->total_dcn_read_bw_with_flip = MaxTotalRDBandwidth; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4977 v->total_dcn_read_bw_with_flip = 0.0; in dml30_ModeSupportAndSystemConfigurationFull()
4979 v->total_dcn_read_bw_with_flip = v->total_dcn_read_bw_with_flip in dml30_ModeSupportAndSystemConfigurationFull()
4993 if (v->total_dcn_read_bw_with_flip > v->ReturnBWPerState[i][j]) { in dml30_ModeSupportAndSystemConfigurationFull()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn314/
Ddisplay_mode_vba_314.c2884 v->total_dcn_read_bw_with_flip = 0.0;
2887 v->total_dcn_read_bw_with_flip = v->total_dcn_read_bw_with_flip
2911 if (v->total_dcn_read_bw_with_flip > v->ReturnBW) {
2913 …otal_dcn_read_bw_with_flip %f (bw w/ flip too high!)\n", __func__, v->total_dcn_read_bw_with_flip);
2916 v->total_dcn_read_bw_with_flip = MaxTotalRDBandwidth;
5293 v->total_dcn_read_bw_with_flip = 0.0;
5295 v->total_dcn_read_bw_with_flip = v->total_dcn_read_bw_with_flip
5309 if (v->total_dcn_read_bw_with_flip > v->ReturnBWPerState[i][j]) {
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_mode_vba_21.c2367 mode_lib->vba.total_dcn_read_bw_with_flip = 0.0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2370 mode_lib->vba.total_dcn_read_bw_with_flip = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2371 mode_lib->vba.total_dcn_read_bw_with_flip + dml_max3( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2388 if (mode_lib->vba.total_dcn_read_bw_with_flip > mode_lib->vba.ReturnBW) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4958 mode_lib->vba.total_dcn_read_bw_with_flip = 0.0; in dml21_ModeSupportAndSystemConfigurationFull()
4960 … mode_lib->vba.total_dcn_read_bw_with_flip = mode_lib->vba.total_dcn_read_bw_with_flip + dml_max3( in dml21_ModeSupportAndSystemConfigurationFull()
4971 if (mode_lib->vba.total_dcn_read_bw_with_flip in dml21_ModeSupportAndSystemConfigurationFull()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_mode_vba.h723 double total_dcn_read_bw_with_flip; member
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddisplay_mode_vba_32.c1081 &v->total_dcn_read_bw_with_flip, // Single *TotalBandwidth in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()