Home
last modified time | relevance | path

Searched refs:tgn10 (Results 1 – 14 of 14) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_resource.c760 struct optc *tgn10 = in dcn201_timing_generator_create() local
763 if (!tgn10) in dcn201_timing_generator_create()
766 tgn10->base.inst = instance; in dcn201_timing_generator_create()
767 tgn10->base.ctx = ctx; in dcn201_timing_generator_create()
769 tgn10->tg_regs = &tg_regs[instance]; in dcn201_timing_generator_create()
770 tgn10->tg_shift = &tg_shift; in dcn201_timing_generator_create()
771 tgn10->tg_mask = &tg_mask; in dcn201_timing_generator_create()
773 dcn201_timing_generator_init(tgn10); in dcn201_timing_generator_create()
775 return &tgn10->base; in dcn201_timing_generator_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn302/
Ddcn302_resource.c611 struct optc *tgn10 = kzalloc(sizeof(struct optc), GFP_KERNEL); in dcn302_timing_generator_create() local
613 if (!tgn10) in dcn302_timing_generator_create()
616 tgn10->base.inst = instance; in dcn302_timing_generator_create()
617 tgn10->base.ctx = ctx; in dcn302_timing_generator_create()
619 tgn10->tg_regs = &optc_regs[instance]; in dcn302_timing_generator_create()
620 tgn10->tg_shift = &optc_shift; in dcn302_timing_generator_create()
621 tgn10->tg_mask = &optc_mask; in dcn302_timing_generator_create()
623 dcn30_timing_generator_init(tgn10); in dcn302_timing_generator_create()
625 return &tgn10->base; in dcn302_timing_generator_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn303/
Ddcn303_resource.c566 struct optc *tgn10 = kzalloc(sizeof(struct optc), GFP_KERNEL); in dcn303_timing_generator_create() local
568 if (!tgn10) in dcn303_timing_generator_create()
571 tgn10->base.inst = instance; in dcn303_timing_generator_create()
572 tgn10->base.ctx = ctx; in dcn303_timing_generator_create()
574 tgn10->tg_regs = &optc_regs[instance]; in dcn303_timing_generator_create()
575 tgn10->tg_shift = &optc_shift; in dcn303_timing_generator_create()
576 tgn10->tg_mask = &optc_mask; in dcn303_timing_generator_create()
578 dcn30_timing_generator_init(tgn10); in dcn303_timing_generator_create()
580 return &tgn10->base; in dcn303_timing_generator_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_resource.c1077 struct optc *tgn10 = in dcn21_timing_generator_create() local
1080 if (!tgn10) in dcn21_timing_generator_create()
1083 tgn10->base.inst = instance; in dcn21_timing_generator_create()
1084 tgn10->base.ctx = ctx; in dcn21_timing_generator_create()
1086 tgn10->tg_regs = &tg_regs[instance]; in dcn21_timing_generator_create()
1087 tgn10->tg_shift = &tg_shift; in dcn21_timing_generator_create()
1088 tgn10->tg_mask = &tg_mask; in dcn21_timing_generator_create()
1090 dcn20_timing_generator_init(tgn10); in dcn21_timing_generator_create()
1092 return &tgn10->base; in dcn21_timing_generator_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_resource.c863 struct optc *tgn10 = in dcn301_timing_generator_create() local
866 if (!tgn10) in dcn301_timing_generator_create()
869 tgn10->base.inst = instance; in dcn301_timing_generator_create()
870 tgn10->base.ctx = ctx; in dcn301_timing_generator_create()
872 tgn10->tg_regs = &optc_regs[instance]; in dcn301_timing_generator_create()
873 tgn10->tg_shift = &optc_shift; in dcn301_timing_generator_create()
874 tgn10->tg_mask = &optc_mask; in dcn301_timing_generator_create()
876 dcn30_timing_generator_init(tgn10); in dcn301_timing_generator_create()
878 return &tgn10->base; in dcn301_timing_generator_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_resource.c713 struct optc *tgn10 = in dcn10_timing_generator_create() local
716 if (!tgn10) in dcn10_timing_generator_create()
719 tgn10->base.inst = instance; in dcn10_timing_generator_create()
720 tgn10->base.ctx = ctx; in dcn10_timing_generator_create()
722 tgn10->tg_regs = &tg_regs[instance]; in dcn10_timing_generator_create()
723 tgn10->tg_shift = &tg_shift; in dcn10_timing_generator_create()
724 tgn10->tg_mask = &tg_mask; in dcn10_timing_generator_create()
726 dcn10_timing_generator_init(tgn10); in dcn10_timing_generator_create()
728 return &tgn10->base; in dcn10_timing_generator_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn314/
Ddcn314_resource.c1095 struct optc *tgn10 = in dcn31_timing_generator_create() local
1098 if (!tgn10) in dcn31_timing_generator_create()
1101 tgn10->base.inst = instance; in dcn31_timing_generator_create()
1102 tgn10->base.ctx = ctx; in dcn31_timing_generator_create()
1104 tgn10->tg_regs = &optc_regs[instance]; in dcn31_timing_generator_create()
1105 tgn10->tg_shift = &optc_shift; in dcn31_timing_generator_create()
1106 tgn10->tg_mask = &optc_mask; in dcn31_timing_generator_create()
1108 dcn314_timing_generator_init(tgn10); in dcn31_timing_generator_create()
1110 return &tgn10->base; in dcn31_timing_generator_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn315/
Ddcn315_resource.c1065 struct optc *tgn10 = in dcn31_timing_generator_create() local
1068 if (!tgn10) in dcn31_timing_generator_create()
1071 tgn10->base.inst = instance; in dcn31_timing_generator_create()
1072 tgn10->base.ctx = ctx; in dcn31_timing_generator_create()
1074 tgn10->tg_regs = &optc_regs[instance]; in dcn31_timing_generator_create()
1075 tgn10->tg_shift = &optc_shift; in dcn31_timing_generator_create()
1076 tgn10->tg_mask = &optc_mask; in dcn31_timing_generator_create()
1078 dcn31_timing_generator_init(tgn10); in dcn31_timing_generator_create()
1080 return &tgn10->base; in dcn31_timing_generator_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn316/
Ddcn316_resource.c1064 struct optc *tgn10 = in dcn31_timing_generator_create() local
1067 if (!tgn10) in dcn31_timing_generator_create()
1070 tgn10->base.inst = instance; in dcn31_timing_generator_create()
1071 tgn10->base.ctx = ctx; in dcn31_timing_generator_create()
1073 tgn10->tg_regs = &optc_regs[instance]; in dcn31_timing_generator_create()
1074 tgn10->tg_shift = &optc_shift; in dcn31_timing_generator_create()
1075 tgn10->tg_mask = &optc_mask; in dcn31_timing_generator_create()
1077 dcn31_timing_generator_init(tgn10); in dcn31_timing_generator_create()
1079 return &tgn10->base; in dcn31_timing_generator_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn321/
Ddcn321_resource.c1002 struct optc *tgn10 = in dcn321_timing_generator_create() local
1005 if (!tgn10) in dcn321_timing_generator_create()
1015 tgn10->base.inst = instance; in dcn321_timing_generator_create()
1016 tgn10->base.ctx = ctx; in dcn321_timing_generator_create()
1018 tgn10->tg_regs = &optc_regs[instance]; in dcn321_timing_generator_create()
1019 tgn10->tg_shift = &optc_shift; in dcn321_timing_generator_create()
1020 tgn10->tg_mask = &optc_mask; in dcn321_timing_generator_create()
1022 dcn32_timing_generator_init(tgn10); in dcn321_timing_generator_create()
1024 return &tgn10->base; in dcn321_timing_generator_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_resource.c1069 struct optc *tgn10 = in dcn31_timing_generator_create() local
1072 if (!tgn10) in dcn31_timing_generator_create()
1075 tgn10->base.inst = instance; in dcn31_timing_generator_create()
1076 tgn10->base.ctx = ctx; in dcn31_timing_generator_create()
1078 tgn10->tg_regs = &optc_regs[instance]; in dcn31_timing_generator_create()
1079 tgn10->tg_shift = &optc_shift; in dcn31_timing_generator_create()
1080 tgn10->tg_mask = &optc_mask; in dcn31_timing_generator_create()
1082 dcn31_timing_generator_init(tgn10); in dcn31_timing_generator_create()
1084 return &tgn10->base; in dcn31_timing_generator_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_resource.c900 struct optc *tgn10 = in dcn30_timing_generator_create() local
903 if (!tgn10) in dcn30_timing_generator_create()
906 tgn10->base.inst = instance; in dcn30_timing_generator_create()
907 tgn10->base.ctx = ctx; in dcn30_timing_generator_create()
909 tgn10->tg_regs = &optc_regs[instance]; in dcn30_timing_generator_create()
910 tgn10->tg_shift = &optc_shift; in dcn30_timing_generator_create()
911 tgn10->tg_mask = &optc_mask; in dcn30_timing_generator_create()
913 dcn30_timing_generator_init(tgn10); in dcn30_timing_generator_create()
915 return &tgn10->base; in dcn30_timing_generator_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_resource.c1003 struct optc *tgn10 = in dcn32_timing_generator_create() local
1006 if (!tgn10) in dcn32_timing_generator_create()
1016 tgn10->base.inst = instance; in dcn32_timing_generator_create()
1017 tgn10->base.ctx = ctx; in dcn32_timing_generator_create()
1019 tgn10->tg_regs = &optc_regs[instance]; in dcn32_timing_generator_create()
1020 tgn10->tg_shift = &optc_shift; in dcn32_timing_generator_create()
1021 tgn10->tg_mask = &optc_mask; in dcn32_timing_generator_create()
1023 dcn32_timing_generator_init(tgn10); in dcn32_timing_generator_create()
1025 return &tgn10->base; in dcn32_timing_generator_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_resource.c897 struct optc *tgn10 = in dcn20_timing_generator_create() local
900 if (!tgn10) in dcn20_timing_generator_create()
903 tgn10->base.inst = instance; in dcn20_timing_generator_create()
904 tgn10->base.ctx = ctx; in dcn20_timing_generator_create()
906 tgn10->tg_regs = &tg_regs[instance]; in dcn20_timing_generator_create()
907 tgn10->tg_shift = &tg_shift; in dcn20_timing_generator_create()
908 tgn10->tg_mask = &tg_mask; in dcn20_timing_generator_create()
910 dcn20_timing_generator_init(tgn10); in dcn20_timing_generator_create()
912 return &tgn10->base; in dcn20_timing_generator_create()