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Searched refs:tRR_min (Results 1 – 9 of 9) sorted by relevance

/linux-6.1.9/drivers/mtd/nand/raw/
Dnand_timings.c58 .tRR_min = 40000,
103 .tRR_min = 20000,
147 .tRR_min = 20000,
193 .tRR_min = 20000,
238 .tRR_min = 20000,
283 .tRR_min = 20000,
330 .tRR_min = 20000,
372 .tRR_min = 20000,
414 .tRR_min = 20000,
456 .tRR_min = 20000,
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Drenesas-nand-controller.c920 TIM_SEQ1_TRR(TO_CYCLES64(sdr->tRR_min, period_ns)) | in rnandc_setup_interface()
960 TIM_GEN_SEQ2_D8(TO_CYCLES64(sdr->tRR_min + sdr->tREA_max, period_ns)) | in rnandc_setup_interface()
961 TIM_GEN_SEQ2_D9(TO_CYCLES64(sdr->tRR_min, period_ns)) | in rnandc_setup_interface()
Dpl35x-nand-controller.c624 ndelay(PSEC_TO_NSEC(sdr->tRR_min)); in pl35x_nand_read_page_hwecc()
842 val = TO_CYCLES(sdr->tRR_min, period_ns); in pl35x_nfc_setup_interface()
Dsunxi_nand.c1452 if (timings->tRR_min > (min_clk_period * 3)) in sunxi_nfc_setup_interface()
1453 min_clk_period = DIV_ROUND_UP(timings->tRR_min, 3); in sunxi_nfc_setup_interface()
Dnand_base.c1143 NAND_COMMON_TIMING_NS(conf, tRR_min)), in nand_sp_exec_read_page_op()
1186 NAND_COMMON_TIMING_NS(conf, tRR_min)), in nand_lp_exec_read_page_op()
1282 NAND_COMMON_TIMING_NS(conf, tRR_min)), in nand_read_param_page_op()
1952 NAND_COMMON_TIMING_NS(conf, tRR_min)), in nand_get_features_op()
Dtegra_nand.c792 val = DIV_ROUND_UP(max3(timings->tAR_min, timings->tRR_min, in tegra_nand_setup_timing()
Dmxc_nand.c1191 timings->tRR_min > 6 * tRC_ps || in mxc_nand_v2_setup_interface()
/linux-6.1.9/include/linux/mtd/
Drawnand.h465 u32 tRR_min; member
553 u32 tRR_min; member
/linux-6.1.9/drivers/mtd/nand/raw/atmel/
Dnand-controller.c1441 ncycles = DIV_ROUND_UP(conf->timings.sdr.tRR_min, mckperiodps); in atmel_smc_nand_prepare_smcconf()