Searched refs:strapping (Results 1 – 25 of 33) sorted by relevance
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119 /* AR8035 pin strapping: IO voltage: pull up */121 /* AR8035 pin strapping: PHYADDR#0: pull down */123 /* AR8035 pin strapping: PHYADDR#1: pull down */125 /* AR8035 pin strapping: MODE#1: pull up */127 /* AR8035 pin strapping: MODE#3: pull up */129 /* AR8035 pin strapping: MODE#0: pull down */
277 /* AR8035 pin strapping: IO voltage: pull up */279 /* AR8035 pin strapping: PHYADDR#0: pull down */281 /* AR8035 pin strapping: PHYADDR#1: pull down */283 /* AR8035 pin strapping: MODE#1: pull up */285 /* AR8035 pin strapping: MODE#3: pull up */287 /* AR8035 pin strapping: MODE#0: pull down */
444 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 /* AR8035 pin strapping: IO voltage: pull up */445 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030 /* AR8035 pin strapping: PHYADDR#0: pull down */446 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030 /* AR8035 pin strapping: PHYADDR#1: pull down */447 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 /* AR8035 pin strapping: MODE#1: pull up */448 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 /* AR8035 pin strapping: MODE#3: pull up */449 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 /* AR8035 pin strapping: MODE#0: pull down */
383 /* AR8035 pin strapping: IO voltage: pull up */385 /* AR8035 pin strapping: PHYADDR#0: pull down */387 /* AR8035 pin strapping: PHYADDR#1: pull down */389 /* AR8035 pin strapping: MODE#1: pull up */391 /* AR8035 pin strapping: MODE#3: pull up */393 /* AR8035 pin strapping: MODE#0: pull down */
30 static u32 strapping; variable84 return strapping; in tegra_read_straps()231 strapping = readl_relaxed(strapping_base); in tegra_init_apbmisc()
14 registers that can be used to identify a given chip and various strapping29 indicate strapping options
32 indicate strapping options
3 This device supports both I2C and SPI (configured with pin strapping
10 These devices support both I2C and SPI (configured with pin strapping
3 These devices support both I2C and SPI (configured with pin strapping
47 Ignore power-on pin strapping to configure LED open-drain or EEPROM49 the OEM has decided not to use pin strapping and falls back to SW regs.56 OEM does not use pin strapping to set this mode and prefers to set it
94 strapping. The default strapping will use a delay of 2.00 ns. Thus
43 by the FXEN boot strapping pin. It can't be determined from the PHY
30 the QCA7000 is setup via GPIO pin strapping. If the
85 by hardware strapping, and must match the configuration specified here.