/linux-6.1.9/net/9p/ |
D | trans_rdma.c | 84 int sq_depth; member 126 int sq_depth; member 157 if (rdma->sq_depth != P9_RDMA_SQ_DEPTH) in p9_rdma_show_options() 158 seq_printf(m, ",sq=%u", rdma->sq_depth); in p9_rdma_show_options() 183 opts->sq_depth = P9_RDMA_SQ_DEPTH; in parse_opts() 218 opts->sq_depth = option; in parse_opts() 234 opts->rq_depth = max(opts->rq_depth, opts->sq_depth); in parse_opts() 573 rdma->sq_depth = opts->sq_depth; in alloc_rdma() 578 sema_init(&rdma->sq_sem, rdma->sq_depth); in alloc_rdma() 690 opts.sq_depth + opts.rq_depth + 1, in rdma_create_trans() [all …]
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/linux-6.1.9/drivers/net/ethernet/fungible/funcore/ |
D | fun_queue.h | 46 u32 sq_depth; member 97 if (++tail == funq->sq_depth) in funq_sq_post_tail() 123 u32 sq_depth; member 133 u8 sqe_size_log2, u32 sq_depth, dma_addr_t dma_addr,
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D | fun_queue.c | 76 u8 sqe_size_log2, u32 sq_depth, dma_addr_t dma_addr, in fun_sq_create() argument 89 if (sq_depth > fdev->q_depth) in fun_sq_create() 94 wb_addr = dma_addr + (sq_depth << sqe_size_log2); in fun_sq_create() 101 sq_depth - 1, dma_addr, 0, in fun_sq_create() 356 funq->sq_cmds = fun_alloc_ring_mem(funq->fdev->dev, funq->sq_depth, in fun_alloc_sqes() 390 fun_free_ring_mem(dev, funq->sq_depth, 1 << funq->sqe_size_log2, in fun_free_queue() 442 funq->sq_depth = req->sq_depth; in fun_alloc_queue() 512 funq->sqe_size_log2, funq->sq_depth, in fun_create_sq()
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D | fun_dev.c | 232 .sq_depth = areq->sq_depth, in fun_enable_admin_queue() 235 unsigned int ntags = areq->sq_depth - 1; in fun_enable_admin_queue() 242 if (areq->sq_depth < AQA_MIN_QUEUE_SIZE || in fun_enable_admin_queue() 243 areq->sq_depth > AQA_MAX_QUEUE_SIZE || in fun_enable_admin_queue() 270 writel((funq->sq_depth - 1) << AQA_ASQS_SHIFT | in fun_enable_admin_queue() 402 if (++funq->sq_tail == funq->sq_depth) in fun_submit_admin_cmd()
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D | fun_dev.h | 93 u16 sq_depth; member
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/linux-6.1.9/drivers/net/ethernet/fungible/funeth/ |
D | funeth.h | 77 unsigned int sq_depth; member 115 unsigned int sq_depth; member
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D | funeth_main.c | 494 xdpqs = alloc_xdpqs(netdev, qset->nxdpqs, qset->sq_depth, in fun_alloc_rings() 503 err = alloc_txqs(netdev, txqs, qset->ntxqs, qset->sq_depth, in fun_alloc_rings() 843 .sq_depth = fp->sq_depth, in funeth_open() 1085 xdpqs = alloc_xdpqs(dev, nqs, fp->sq_depth, 0, FUN_QSTATE_INIT_FULL); in fun_enter_xdp() 1647 .sq_depth = fp->sq_depth, in fun_change_num_queues() 1782 fp->sq_depth = min(SQ_DEPTH, fdev->q_depth); in fun_create_netdev() 2007 .sq_depth = ADMIN_SQ_DEPTH, in funeth_probe()
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D | funeth_ethtool.c | 567 ring->tx_pending = fp->sq_depth; in fun_get_ringparam() 593 if (fp->sq_depth == ring->tx_pending && in fun_set_ringparam() 601 .sq_depth = ring->tx_pending in fun_set_ringparam() 609 fp->sq_depth = ring->tx_pending; in fun_set_ringparam()
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/linux-6.1.9/include/uapi/misc/uacce/ |
D | hisi_qm.h | 26 __u16 sq_depth; member
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/linux-6.1.9/drivers/net/ethernet/huawei/hinic/ |
D | hinic_hw_dev.c | 270 static int set_hw_ioctxt(struct hinic_hwdev *hwdev, unsigned int sq_depth, in set_hw_ioctxt() argument 289 hw_ioctxt.sq_depth = ilog2(sq_depth); in set_hw_ioctxt() 438 int hinic_hwdev_ifup(struct hinic_hwdev *hwdev, u16 sq_depth, u16 rq_depth) in hinic_hwdev_ifup() argument 461 func_to_io->sq_depth = sq_depth; in hinic_hwdev_ifup() 489 err = set_hw_ioctxt(hwdev, sq_depth, rq_depth); in hinic_hwdev_ifup()
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D | hinic_dev.h | 95 u16 sq_depth; member
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D | hinic_hw_io.h | 73 u16 sq_depth; member
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D | hinic_hw_dev.h | 222 u16 sq_depth; member 561 int hinic_hwdev_ifup(struct hinic_hwdev *hwdev, u16 sq_depth, u16 rq_depth);
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D | hinic_ethtool.c | 558 ring->tx_pending = nic_dev->sq_depth; in hinic_get_ringparam() 599 if (new_sq_depth == nic_dev->sq_depth && in hinic_set_ringparam() 605 nic_dev->sq_depth, nic_dev->rq_depth, in hinic_set_ringparam() 608 nic_dev->sq_depth = new_sq_depth; in hinic_set_ringparam()
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D | hinic_hw_mbox.c | 1291 (hw_ctxt)->sq_depth >= HINIC_QUEUE_MIN_DEPTH && \ 1292 (hw_ctxt)->sq_depth <= HINIC_QUEUE_MAX_DEPTH && \ 1300 if (!hw_ctxt->rq_depth && !hw_ctxt->sq_depth && in hw_ctxt_qps_param_valid()
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D | hinic_hw_io.c | 285 func_to_io->sq_depth, HINIC_SQ_WQE_MAX_SIZE); in init_qp()
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D | hinic_main.c | 422 err = hinic_hwdev_ifup(nic_dev->hwdev, nic_dev->sq_depth, in hinic_open() 1201 nic_dev->sq_depth = HINIC_SQ_DEPTH; in nic_dev_init()
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/linux-6.1.9/drivers/crypto/hisilicon/ |
D | qm.c | 284 #define QM_MK_SQC_DW3_V2(sqe_sz, sq_depth) \ argument 285 ((((u32)sq_depth) - 1) | ((u32)ilog2(sqe_sz) << QM_SQ_SQE_SIZE_SHIFT)) 2093 u16 sq_depth = qm->qp_array->cq_depth; in qm_sq_dump() local 2099 ret = q_dump_param_parse(qm, s, &sqe_id, &qp_id, sq_depth); in qm_sq_dump() 2103 sqe = kzalloc(qm->sqe_size * sq_depth, GFP_KERNEL); in qm_sq_dump() 2108 memcpy(sqe, qp->sqe, qm->sqe_size * sq_depth); in qm_sq_dump() 2806 if (unlikely(atomic_read(&qp->qp_status.used) == qp->sq_depth - 1)) in qm_get_avail_sqe() 2928 sqc->w8 = cpu_to_le16(qp->sq_depth - 1); in qm_sq_ctx_cfg() 2930 sqc->dw3 = cpu_to_le32(QM_MK_SQC_DW3_V2(qm->sqe_size, qp->sq_depth)); in qm_sq_ctx_cfg() 3060 u16 sq_depth = qp->sq_depth; in qp_stop_fail_cb() local [all …]
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/linux-6.1.9/drivers/infiniband/hw/efa/ |
D | efa_com_cmd.h | 23 u32 sq_depth; member
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D | efa_com_cmd.c | 28 params->sq_depth; in efa_com_create_qp()
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/linux-6.1.9/drivers/crypto/hisilicon/zip/ |
D | zip_crypto.c | 605 u16 q_depth = ctx->qp_ctx[0].qp->sq_depth; in hisi_zip_create_req_q() 657 u16 q_depth = ctx->qp_ctx[0].qp->sq_depth; in hisi_zip_create_sgl_pool()
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/linux-6.1.9/include/linux/ |
D | hisi_acc_qm.h | 360 u16 sq_depth; member
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/linux-6.1.9/drivers/net/ethernet/amazon/ena/ |
D | ena_admin_defs.h | 229 u16 sq_depth; member
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/linux-6.1.9/drivers/crypto/hisilicon/sec2/ |
D | sec_crypto.c | 141 req_id = idr_alloc_cyclic(&qp_ctx->req_idr, NULL, 0, qp_ctx->qp->sq_depth, GFP_ATOMIC); in sec_alloc_req_id() 159 if (unlikely(req_id < 0 || req_id >= qp_ctx->qp->sq_depth)) { in sec_free_req_id() 489 u16 q_depth = qp_ctx->qp->sq_depth; in sec_alloc_qp_ctx_resource() 606 ctx->fake_req_limit = ctx->qps[0]->sq_depth >> 1; in sec_ctx_base_init()
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/linux-6.1.9/drivers/crypto/hisilicon/hpre/ |
D | hpre_crypto.c | 156 id = idr_alloc(&ctx->req_idr, NULL, 0, ctx->qp->sq_depth, GFP_ATOMIC); in hpre_alloc_req_id() 497 ret = hpre_ctx_set(ctx, qp, qp->sq_depth); in hpre_ctx_init()
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