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Searched refs:sps (Results 1 – 25 of 48) sorted by relevance

12

/linux-6.1.9/drivers/media/platform/allegro-dvt/
Dnal-h264.c198 static void nal_h264_rbsp_sps(struct rbsp *rbsp, struct nal_h264_sps *sps) in nal_h264_rbsp_sps() argument
202 if (!sps) { in nal_h264_rbsp_sps()
207 rbsp_bits(rbsp, 8, &sps->profile_idc); in nal_h264_rbsp_sps()
208 rbsp_bit(rbsp, &sps->constraint_set0_flag); in nal_h264_rbsp_sps()
209 rbsp_bit(rbsp, &sps->constraint_set1_flag); in nal_h264_rbsp_sps()
210 rbsp_bit(rbsp, &sps->constraint_set2_flag); in nal_h264_rbsp_sps()
211 rbsp_bit(rbsp, &sps->constraint_set3_flag); in nal_h264_rbsp_sps()
212 rbsp_bit(rbsp, &sps->constraint_set4_flag); in nal_h264_rbsp_sps()
213 rbsp_bit(rbsp, &sps->constraint_set5_flag); in nal_h264_rbsp_sps()
214 rbsp_bits(rbsp, 2, &sps->reserved_zero_2bits); in nal_h264_rbsp_sps()
[all …]
Dnal-hevc.c340 static void nal_hevc_rbsp_sps(struct rbsp *rbsp, struct nal_hevc_sps *sps) in nal_hevc_rbsp_sps() argument
344 rbsp_bits(rbsp, 4, &sps->video_parameter_set_id); in nal_hevc_rbsp_sps()
345 rbsp_bits(rbsp, 3, &sps->max_sub_layers_minus1); in nal_hevc_rbsp_sps()
346 rbsp_bit(rbsp, &sps->temporal_id_nesting_flag); in nal_hevc_rbsp_sps()
347 nal_hevc_rbsp_profile_tier_level(rbsp, &sps->profile_tier_level); in nal_hevc_rbsp_sps()
348 rbsp_uev(rbsp, &sps->seq_parameter_set_id); in nal_hevc_rbsp_sps()
350 rbsp_uev(rbsp, &sps->chroma_format_idc); in nal_hevc_rbsp_sps()
351 if (sps->chroma_format_idc == 3) in nal_hevc_rbsp_sps()
352 rbsp_bit(rbsp, &sps->separate_colour_plane_flag); in nal_hevc_rbsp_sps()
353 rbsp_uev(rbsp, &sps->pic_width_in_luma_samples); in nal_hevc_rbsp_sps()
[all …]
Dallegro-core.c1573 struct nal_h264_sps *sps; in allegro_h264_write_sps() local
1584 sps = kzalloc(sizeof(*sps), GFP_KERNEL); in allegro_h264_write_sps()
1585 if (!sps) in allegro_h264_write_sps()
1591 sps->profile_idc = nal_h264_profile(profile); in allegro_h264_write_sps()
1592 sps->constraint_set0_flag = 0; in allegro_h264_write_sps()
1593 sps->constraint_set1_flag = 1; in allegro_h264_write_sps()
1594 sps->constraint_set2_flag = 0; in allegro_h264_write_sps()
1595 sps->constraint_set3_flag = 0; in allegro_h264_write_sps()
1596 sps->constraint_set4_flag = 0; in allegro_h264_write_sps()
1597 sps->constraint_set5_flag = 0; in allegro_h264_write_sps()
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Dnal-h264.h390 void *dest, size_t n, struct nal_h264_sps *sps);
392 struct nal_h264_sps *sps, void *src, size_t n);
393 void nal_h264_print_sps(const struct device *dev, struct nal_h264_sps *sps);
/linux-6.1.9/drivers/media/platform/chips-media/
Dcoda-h264.c259 struct rbsp sps; in coda_h264_sps_fixup() local
266 sps.buf = buf + 5; /* Skip NAL header */ in coda_h264_sps_fixup()
267 sps.size = *size - 5; in coda_h264_sps_fixup()
269 profile_idc = sps.buf[0]; in coda_h264_sps_fixup()
272 sps.pos = 24; in coda_h264_sps_fixup()
275 ret = rbsp_read_uev(&sps, NULL); in coda_h264_sps_fixup()
291 ret = rbsp_read_uev(&sps, NULL); in coda_h264_sps_fixup()
295 ret = rbsp_read_uev(&sps, &pic_order_cnt_type); in coda_h264_sps_fixup()
301 ret = rbsp_read_uev(&sps, NULL); in coda_h264_sps_fixup()
308 ret = rbsp_read_bit(&sps); in coda_h264_sps_fixup()
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/linux-6.1.9/drivers/soc/actions/
Dowl-sps.c44 struct owl_sps *sps; member
54 return owl_sps_set_pg(pd->sps->base, pwr_mask, ack_mask, enable); in owl_sps_set_power()
61 dev_dbg(pd->sps->dev, "%s power on", pd->info->name); in owl_sps_power_on()
70 dev_dbg(pd->sps->dev, "%s power off", pd->info->name); in owl_sps_power_off()
75 static int owl_sps_init_domain(struct owl_sps *sps, int index) in owl_sps_init_domain() argument
79 pd = devm_kzalloc(sps->dev, sizeof(*pd), GFP_KERNEL); in owl_sps_init_domain()
83 pd->info = &sps->info->domains[index]; in owl_sps_init_domain()
84 pd->sps = sps; in owl_sps_init_domain()
92 sps->genpd_data.domains[index] = &pd->genpd; in owl_sps_init_domain()
101 struct owl_sps *sps; in owl_sps_probe() local
[all …]
DMakefile3 obj-$(CONFIG_OWL_PM_DOMAINS_HELPER) += owl-sps-helper.o
4 obj-$(CONFIG_OWL_PM_DOMAINS) += owl-sps.o
/linux-6.1.9/drivers/media/platform/verisilicon/
Dhantro_g2_hevc_dec.c30 const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; in prepare_tile_info_buffer() local
44 max_log2_ctb_size = sps->log2_min_luma_coding_block_size_minus3 + 3 + in prepare_tile_info_buffer()
45 sps->log2_diff_max_min_luma_coding_block_size; in prepare_tile_info_buffer()
46 pic_width_in_ctbs = (sps->pic_width_in_luma_samples + in prepare_tile_info_buffer()
48 pic_height_in_ctbs = (sps->pic_height_in_luma_samples + (1 << max_log2_ctb_size) - 1) in prepare_tile_info_buffer()
124 const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; in compute_header_skip_length() local
132 if (sps->flags & V4L2_HEVC_SPS_FLAG_SEPARATE_COLOUR_PLANE) in compute_header_skip_length()
138 skip += sps->log2_max_pic_order_cnt_lsb_minus4 + 4; in compute_header_skip_length()
146 else if (sps->num_short_term_ref_pic_sets > 1) in compute_header_skip_length()
147 skip += fls(sps->num_short_term_ref_pic_sets - 1); in compute_header_skip_length()
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Dhantro_g1_h264_dec.c26 const struct v4l2_ctrl_h264_sps *sps = ctrls->sps; in set_params() local
33 if (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD) in set_params()
35 if (sps->profile_idc > 66) { in set_params()
41 if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY) && in set_params()
42 (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD || in set_params()
54 G1_REG_DEC_CTRL1_REF_FRAMES(sps->max_num_ref_frames); in set_params()
63 if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY)) in set_params()
74 reg = G1_REG_DEC_CTRL4_FRAMENUM_LEN(sps->log2_max_frame_num_minus4 + 4) | in set_params()
79 if (sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE) in set_params()
81 if (sps->profile_idc >= 100 && sps->chroma_format_idc == 0) in set_params()
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Dhantro_hevc.c76 const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; in tile_buffer_reallocate() local
78 unsigned int height64 = (sps->pic_height_in_luma_samples + 63) & ~63; in tile_buffer_reallocate()
157 static int hantro_hevc_validate_sps(struct hantro_ctx *ctx, const struct v4l2_ctrl_hevc_sps *sps) in hantro_hevc_validate_sps() argument
165 ALIGN(sps->pic_width_in_luma_samples, ctx->vpu_dst_fmt->frmsize.step_width)) in hantro_hevc_validate_sps()
169 ALIGN(sps->pic_height_in_luma_samples, ctx->vpu_dst_fmt->frmsize.step_height)) in hantro_hevc_validate_sps()
194 ctrls->sps = in hantro_hevc_dec_prepare_run()
196 if (WARN_ON(!ctrls->sps)) in hantro_hevc_dec_prepare_run()
199 ret = hantro_hevc_validate_sps(ctx, ctrls->sps); in hantro_hevc_dec_prepare_run()
Drockchip_vpu2_hw_h264_dec.c197 const struct v4l2_ctrl_h264_sps *sps = ctrls->sps; in set_params() local
238 VDPU_REG_PIC_INTERLACE_E(!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY) && in set_params()
239 (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD || in set_params()
243 VDPU_REG_WRITE_MVS_E((sps->profile_idc > 66) && dec_param->nal_ref_idc) | in set_params()
244 VDPU_REG_SEQ_MBAFF_E(sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD) | in set_params()
245 VDPU_REG_PICORD_COUNT_E(sps->profile_idc > 66) | in set_params()
268 VDPU_REG_REF_FRAMES(sps->max_num_ref_frames); in set_params()
273 VDPU_REG_FRAMENUM_LEN(sps->log2_max_frame_num_minus4 + 4) | in set_params()
288 VDPU_REG_DIR_8X8_INFER_E(sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE) | in set_params()
289 VDPU_REG_BLACKWHITE_E(sps->profile_idc >= 100 && sps->chroma_format_idc == 0) | in set_params()
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Dhantro_h264.c236 const struct v4l2_ctrl_h264_sps *sps = ctrls->sps; in prepare_table() local
279 !(sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD)) { in prepare_table()
456 ctrls->sps = in hantro_h264_dec_prepare_run()
458 if (WARN_ON(!ctrls->sps)) in hantro_h264_dec_prepare_run()
471 ctrls->sps, ctx->h264_dec.dpb); in hantro_h264_dec_prepare_run()
/linux-6.1.9/Documentation/devicetree/bindings/power/
Dactions,owl-sps.txt4 - compatible : "actions,s500-sps" for S500
5 "actions,s700-sps" for S700
6 "actions,s900-sps" for S900
17 sps: power-controller@b01b0100 {
18 compatible = "actions,s500-sps";
/linux-6.1.9/drivers/staging/media/rkvdec/
Drkvdec-h264.c109 const struct v4l2_ctrl_h264_sps *sps; member
637 const struct v4l2_ctrl_h264_sps *sps = run->sps; in assemble_hw_pps() local
661 WRITE_PPS(sps->chroma_format_idc, CHROMA_FORMAT_IDC); in assemble_hw_pps()
662 WRITE_PPS(sps->bit_depth_luma_minus8, BIT_DEPTH_LUMA); in assemble_hw_pps()
663 WRITE_PPS(sps->bit_depth_chroma_minus8, BIT_DEPTH_CHROMA); in assemble_hw_pps()
665 WRITE_PPS(sps->log2_max_frame_num_minus4, LOG2_MAX_FRAME_NUM_MINUS4); in assemble_hw_pps()
666 WRITE_PPS(sps->max_num_ref_frames, MAX_NUM_REF_FRAMES); in assemble_hw_pps()
667 WRITE_PPS(sps->pic_order_cnt_type, PIC_ORDER_CNT_TYPE); in assemble_hw_pps()
668 WRITE_PPS(sps->log2_max_pic_order_cnt_lsb_minus4, in assemble_hw_pps()
670 WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO), in assemble_hw_pps()
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/linux-6.1.9/drivers/staging/media/sunxi/cedrus/
Dcedrus_h265.c407 const struct v4l2_ctrl_hevc_sps *sps; in cedrus_h265_setup() local
425 sps = run->h265.sps; in cedrus_h265_setup()
441 sps->log2_min_luma_coding_block_size_minus3 + 3 + in cedrus_h265_setup()
442 sps->log2_diff_max_min_luma_coding_block_size; in cedrus_h265_setup()
445 DIV_ROUND_UP(sps->pic_width_in_luma_samples, ctb_size_luma); in cedrus_h265_setup()
561 …reg = VE_DEC_H265_DEC_SPS_HDR_MAX_TRANSFORM_HIERARCHY_DEPTH_INTRA(sps->max_transform_hierarchy_dep… in cedrus_h265_setup()
562 …VE_DEC_H265_DEC_SPS_HDR_MAX_TRANSFORM_HIERARCHY_DEPTH_INTER(sps->max_transform_hierarchy_depth_int… in cedrus_h265_setup()
563 …VE_DEC_H265_DEC_SPS_HDR_LOG2_DIFF_MAX_MIN_TRANSFORM_BLOCK_SIZE(sps->log2_diff_max_min_luma_transfo… in cedrus_h265_setup()
564 …VE_DEC_H265_DEC_SPS_HDR_LOG2_MIN_TRANSFORM_BLOCK_SIZE_MINUS2(sps->log2_min_luma_transform_block_si… in cedrus_h265_setup()
565 …VE_DEC_H265_DEC_SPS_HDR_LOG2_DIFF_MAX_MIN_LUMA_CODING_BLOCK_SIZE(sps->log2_diff_max_min_luma_codin… in cedrus_h265_setup()
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Dcedrus.c34 const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps; in cedrus_try_ctrl() local
36 if (sps->chroma_format_idc != 1) in cedrus_try_ctrl()
39 if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) in cedrus_try_ctrl()
42 if (sps->bit_depth_luma_minus8 != 0) in cedrus_try_ctrl()
46 const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; in cedrus_try_ctrl() local
49 if (sps->chroma_format_idc != 1) in cedrus_try_ctrl()
53 if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) in cedrus_try_ctrl()
58 if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2) in cedrus_try_ctrl()
62 if (sps->bit_depth_luma_minus8 != 0) in cedrus_try_ctrl()
Dcedrus_h264.c98 const struct v4l2_ctrl_h264_sps *sps = run->h264.sps; in cedrus_write_frame_list() local
151 else if (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD) in cedrus_write_frame_list()
327 const struct v4l2_ctrl_h264_sps *sps = run->h264.sps; in cedrus_set_params() local
403 reg |= (sps->chroma_format_idc & 0x7) << 19; in cedrus_set_params()
404 reg |= (sps->pic_width_in_mbs_minus1 & 0xff) << 8; in cedrus_set_params()
405 reg |= sps->pic_height_in_map_units_minus1 & 0xff; in cedrus_set_params()
406 if (sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY) in cedrus_set_params()
408 if (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD) in cedrus_set_params()
410 if (sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE) in cedrus_set_params()
415 (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD); in cedrus_set_params()
[all …]
/linux-6.1.9/drivers/media/platform/mediatek/vcodec/vdec/
Dvdec_h264_req_multi_if.c43 struct mtk_h264_sps_param sps; member
124 struct v4l2_ctrl_h264_sps sps; member
180 const struct v4l2_ctrl_h264_sps *sps; in vdec_h264_slice_fill_decode_parameters() local
193 sps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SPS); in vdec_h264_slice_fill_decode_parameters()
194 if (IS_ERR(sps)) in vdec_h264_slice_fill_decode_parameters()
195 return PTR_ERR(sps); in vdec_h264_slice_fill_decode_parameters()
207 mtk_vdec_h264_copy_sps_params(&slice_param->sps, sps); in vdec_h264_slice_fill_decode_parameters()
211 memcpy(&share_info->sps, sps, sizeof(*sps)); in vdec_h264_slice_fill_decode_parameters()
220 const struct v4l2_ctrl_h264_sps *sps; in get_vdec_sig_decode_parameters() local
237 sps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SPS); in get_vdec_sig_decode_parameters()
[all …]
Dvdec_h264_req_if.c21 struct mtk_h264_sps_param sps; member
100 const struct v4l2_ctrl_h264_sps *sps; in get_vdec_decode_parameters() local
117 sps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SPS); in get_vdec_decode_parameters()
118 if (IS_ERR(sps)) in get_vdec_decode_parameters()
119 return PTR_ERR(sps); in get_vdec_decode_parameters()
132 mtk_vdec_h264_copy_sps_params(&slice_param->sps, sps); in get_vdec_decode_parameters()
141 v4l2_h264_init_reflist_builder(&reflist_builder, dec_params, sps, in get_vdec_decode_parameters()
/linux-6.1.9/drivers/iio/imu/
Dadis16400.c349 int sps, ret; in adis16400_get_freq() local
356 sps = (t & ADIS16400_SMPL_PRD_TIME_BASE) ? 52851 : 1638404; in adis16400_get_freq()
357 sps /= (t & ADIS16400_SMPL_PRD_DIV_MASK) + 1; in adis16400_get_freq()
359 return sps; in adis16400_get_freq()
398 static int __adis16400_set_filter(struct iio_dev *indio_dev, int sps, int val) in __adis16400_set_filter() argument
405 if (sps / adis16400_3db_divisors[i] >= val) in __adis16400_set_filter()
500 int ret, sps; in adis16400_write_raw() local
515 sps = st->variant->get_freq(st); in adis16400_write_raw()
516 if (sps < 0) { in adis16400_write_raw()
518 return sps; in adis16400_write_raw()
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/linux-6.1.9/fs/dlm/
Dconfig.c85 struct dlm_spaces *sps; member
410 struct dlm_spaces *sps = NULL; in make_cluster() local
414 sps = kzalloc(sizeof(struct dlm_spaces), GFP_NOFS); in make_cluster()
417 if (!cl || !sps || !cms) in make_cluster()
420 cl->sps = sps; in make_cluster()
424 config_group_init_type_name(&sps->ss_group, "spaces", &spaces_type); in make_cluster()
427 configfs_add_default_group(&sps->ss_group, &cl->group); in make_cluster()
447 space_list = &sps->ss_group; in make_cluster()
453 kfree(sps); in make_cluster()
474 kfree(cl->sps); in release_cluster()
/linux-6.1.9/include/uapi/linux/
Dv4l2-controls.h1298 #define V4L2_H264_SPS_HAS_CHROMA_FORMAT(sps) \ argument
1299 ((sps)->profile_idc == 100 || (sps)->profile_idc == 110 || \
1300 (sps)->profile_idc == 122 || (sps)->profile_idc == 244 || \
1301 (sps)->profile_idc == 44 || (sps)->profile_idc == 83 || \
1302 (sps)->profile_idc == 86 || (sps)->profile_idc == 118 || \
1303 (sps)->profile_idc == 128 || (sps)->profile_idc == 138 || \
1304 (sps)->profile_idc == 139 || (sps)->profile_idc == 134 || \
1305 (sps)->profile_idc == 135)
/linux-6.1.9/arch/powerpc/sysdev/
Dfsl_gtm.c173 u8 sps; in gtm_set_ref_timer16() local
197 sps = prescaler - 1; in gtm_set_ref_timer16()
200 sps = prescaler / 256 - 1; in gtm_set_ref_timer16()
216 clrsetbits_be16(tmr->gtmdr, 0xFFFF, iclk | GTMDR_SPS(sps) | in gtm_set_ref_timer16()
/linux-6.1.9/drivers/media/platform/nvidia/tegra-vde/
Dh264.c802 v4l2_h264_init_reflist_builder(&b, h->decode_params, h->sps, dpb); in tegra_vde_h264_setup_frames()
887 if (h->sps->profile_idc == 66) in tegra_vde_h264_setup_context()
890 if (h->sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE) in tegra_vde_h264_setup_context()
902 h264->level_idc = to_tegra_vde_h264_level_idc(h->sps->level_idc); in tegra_vde_h264_setup_context()
903 h264->log2_max_pic_order_cnt_lsb = h->sps->log2_max_pic_order_cnt_lsb_minus4 + 4; in tegra_vde_h264_setup_context()
904 h264->log2_max_frame_num = h->sps->log2_max_frame_num_minus4 + 4; in tegra_vde_h264_setup_context()
905 h264->pic_order_cnt_type = h->sps->pic_order_cnt_type; in tegra_vde_h264_setup_context()
906 h264->pic_width_in_mbs = h->sps->pic_width_in_mbs_minus1 + 1; in tegra_vde_h264_setup_context()
907 h264->pic_height_in_mbs = h->sps->pic_height_in_map_units_minus1 + 1; in tegra_vde_h264_setup_context()
/linux-6.1.9/arch/arm/boot/dts/
Dowl-s500.dtsi49 power-domains = <&sps S500_PD_CPU2>;
57 power-domains = <&sps S500_PD_CPU3>;
256 sps: power-controller@b01b0100 { label
257 compatible = "actions,s500-sps";
292 power-domains = <&sps S500_PD_DMA>;

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