Searched refs:speedbin (Results 1 – 10 of 10) sorted by relevance
| /linux-6.1.9/drivers/cpufreq/ ! |
| D | qcom-cpufreq-nvmem.c | 178 u8 *speedbin; in qcom_cpufreq_kryo_name_version() local
188 speedbin = nvmem_cell_read(speedbin_nvmem, &len); in qcom_cpufreq_kryo_name_version()
189 if (IS_ERR(speedbin)) in qcom_cpufreq_kryo_name_version()
190 return PTR_ERR(speedbin); in qcom_cpufreq_kryo_name_version()
194 drv->versions = 1 << (unsigned int)(*speedbin); in qcom_cpufreq_kryo_name_version()
197 drv->versions = 1 << ((unsigned int)(*speedbin) + 4); in qcom_cpufreq_kryo_name_version()
204 kfree(speedbin); in qcom_cpufreq_kryo_name_version()
214 u8 *speedbin; in qcom_cpufreq_krait_name_version() local
218 speedbin = nvmem_cell_read(speedbin_nvmem, &len); in qcom_cpufreq_krait_name_version()
220 if (IS_ERR(speedbin)) in qcom_cpufreq_krait_name_version()
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| D | sun50i-cpufreq-nvmem.c | 38 u32 *speedbin, efuse_value; in sun50i_cpufreq_get_efuse() local
63 speedbin = nvmem_cell_read(speedbin_nvmem, &len); in sun50i_cpufreq_get_efuse()
65 if (IS_ERR(speedbin)) in sun50i_cpufreq_get_efuse()
66 return PTR_ERR(speedbin); in sun50i_cpufreq_get_efuse()
68 efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK; in sun50i_cpufreq_get_efuse()
80 kfree(speedbin); in sun50i_cpufreq_get_efuse()
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| /linux-6.1.9/Documentation/devicetree/bindings/opp/ ! |
| D | opp-v2-kryo-cpu.yaml | 20 defines the voltage and frequency value based on the speedbin blown in
35 speedbin that is used to select the right frequency/voltage
54 0: MSM8996, speedbin 0
55 1: MSM8996, speedbin 1
56 2: MSM8996, speedbin 2
263 speedbin_efuse: speedbin@133 {
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| D | allwinner,sun50i-h6-operating-points.yaml | 17 on the speedbin blown in the efuse combination. The
31 registers that has information about the speedbin that is used
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| /linux-6.1.9/drivers/gpu/drm/msm/adreno/ ! |
| D | adreno_gpu.c | 273 *value |= ((uint64_t) adreno_gpu->speedbin) << 32; in adreno_get_param()
1032 int adreno_read_speedbin(struct device *dev, u32 *speedbin) in adreno_read_speedbin() argument
1034 return nvmem_cell_read_variable_le_u32(dev, "speed_bin", speedbin); in adreno_read_speedbin()
1047 u32 speedbin; in adreno_gpu_init() local
1055 if (adreno_read_speedbin(dev, &speedbin) || !speedbin) in adreno_gpu_init()
1056 speedbin = 0xffff; in adreno_gpu_init()
1057 adreno_gpu->speedbin = (uint16_t) (0xffff & speedbin); in adreno_gpu_init()
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| D | adreno_gpu.h | 82 uint16_t speedbin; member
341 int adreno_read_speedbin(struct device *dev, u32 *speedbin);
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| D | a6xx_gpu.c | 1927 u32 speedbin; in a6xx_set_supported_hw() local
1930 ret = adreno_read_speedbin(dev, &speedbin); in a6xx_set_supported_hw()
1943 supp_hw = fuse_to_supp_hw(dev, rev, speedbin); in a6xx_set_supported_hw()
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| /linux-6.1.9/arch/arm/boot/dts/ ! |
| D | qcom-ipq8064.dtsi | 379 speedbin_efuse: speedbin@c0 {
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| /linux-6.1.9/arch/arm64/boot/dts/qcom/ ! |
| D | qcs404.dtsi | 370 cpr_efuse_speedbin: speedbin@13c {
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| D | msm8996.dtsi | 695 speedbin_efuse: speedbin@133 {
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