Searched refs:socclk (Results 1 – 20 of 20) sorted by relevance
343 smu->smu_table.boot_values.socclk = 0; in smu_v12_0_get_vbios_bootup_values()360 smu->smu_table.boot_values.socclk = 0; in smu_v12_0_get_vbios_bootup_values()377 &smu->smu_table.boot_values.socclk); in smu_v12_0_get_vbios_bootup_values()
300 clock_limit = smu->smu_table.boot_values.socclk; in renoir_get_dpm_ultimate_freq()
127 float socclk; member564 float socclk; /*MHz*/ member
641 smu->smu_table.boot_values.socclk = 0; in smu_v13_0_get_vbios_bootup_values()655 smu->smu_table.boot_values.socclk = 0; in smu_v13_0_get_vbios_bootup_values()670 smu->smu_table.boot_values.socclk = 0; in smu_v13_0_get_vbios_bootup_values()692 smu->smu_table.boot_values.socclk = smu_info_v3_6->bootup_socclk_10khz; in smu_v13_0_get_vbios_bootup_values()701 smu->smu_table.boot_values.socclk = smu_info_v4_0->bootup_socclk_10khz; in smu_v13_0_get_vbios_bootup_values()929 max_sustainable_clocks->soc_clock = smu->smu_table.boot_values.socclk / 100; in smu_v13_0_init_max_sustainable_clocks()1577 clock_limit = smu->smu_table.boot_values.socclk; in smu_v13_0_get_dpm_ultimate_freq()
742 clock_limit = smu->smu_table.boot_values.socclk; in smu_v13_0_4_get_dpm_ultimate_freq()
742 clock_limit = smu->smu_table.boot_values.socclk; in smu_v13_0_5_get_dpm_ultimate_freq()
868 clock_limit = smu->smu_table.boot_values.socclk; in yellow_carp_get_dpm_ultimate_freq()
563 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in smu_v13_0_7_set_default_dpm_table()
324 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in aldebaran_set_default_dpm_table()
534 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in smu_v13_0_0_set_default_dpm_table()
582 smu->smu_table.boot_values.socclk = 0; in smu_v11_0_get_vbios_bootup_values()599 smu->smu_table.boot_values.socclk = 0; in smu_v11_0_get_vbios_bootup_values()616 &smu->smu_table.boot_values.socclk); in smu_v11_0_get_vbios_bootup_values()863 max_sustainable_clocks->soc_clock = smu->smu_table.boot_values.socclk / 100; in smu_v11_0_init_max_sustainable_clocks()1734 clock_limit = smu->smu_table.boot_values.socclk; in smu_v11_0_get_dpm_ultimate_freq()
939 clock_limit = smu->smu_table.boot_values.socclk; in vangogh_get_dpm_ultimate_freq()
346 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in arcturus_set_default_dpm_table()
981 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in navi10_set_default_dpm_table()
945 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in sienna_cichlid_set_default_dpm_table()
113 .socclk = 208, /*MHz*/498 input->clks_cfg.socclk_mhz = v->socclk; in dcn_bw_calc_rq_dlg_ttu()797 v->socclk = dc->dcn_soc->socclk; in dcn_validate_bandwidth()1497 *socclk_khz = dc->dcn_soc->socclk * 1000; in dcn_get_soc_clks()1616 dc->dcn_soc->socclk * 1000, in dcn_bw_sync_calcs_and_dml()
1337 …clock_change_latency + v->write_back_latency + v->writeback_chunk_size * 1024.0 / 32.0 / v->socclk; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
289 uint32_t socclk; member
537 unsigned int socclk = context->bw_ctx.dml.vba.SOCCLKPerState[vlevel]; in dcn32_set_phantom_stream_timing() local564 pipes[0].clks_cfg.socclk_mhz = socclk; in dcn32_set_phantom_stream_timing()
518 uint16_t virtual_voltage_id, int32_t *socclk) in vega10_get_socclk_for_voltage_evv() argument540 *socclk = table_info->vdd_dep_on_socclk->entries[entry_id].clk; in vega10_get_socclk_for_voltage_evv()