/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/ |
D | smu_cmn.c | 851 int smu_cmn_update_table(struct smu_context *smu, in smu_cmn_update_table() function 902 return smu_cmn_update_table(smu, in smu_cmn_write_watermarks_table() 913 return smu_cmn_update_table(smu, in smu_cmn_write_pptable() 932 ret = smu_cmn_update_table(smu, in smu_cmn_get_metrics_table() 954 return smu_cmn_update_table(smu, in smu_cmn_get_combo_pptable()
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D | smu_cmn.h | 91 int smu_cmn_update_table(struct smu_context *smu,
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/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
D | smu_v12_0.c | 205 return smu_cmn_update_table(smu, SMU_TABLE_DPMCLOCKS, 0, smu_table->clocks_table, false); in smu_v12_0_set_default_dpm_tables()
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/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
D | smu_v13_0_0_ppt.c | 1568 result = smu_cmn_update_table(smu, in smu_v13_0_0_get_power_profile_mode() 1628 ret = smu_cmn_update_table(smu, in smu_v13_0_0_set_power_profile_mode() 1661 ret = smu_cmn_update_table(smu, in smu_v13_0_0_set_power_profile_mode() 1783 r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true); in smu_v13_0_0_i2c_xfer()
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D | smu_v13_0_7_ppt.c | 1485 result = smu_cmn_update_table(smu, in smu_v13_0_7_get_power_profile_mode() 1541 ret = smu_cmn_update_table(smu, in smu_v13_0_7_set_power_profile_mode() 1570 ret = smu_cmn_update_table(smu, in smu_v13_0_7_set_power_profile_mode()
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D | smu_v13_0_5_ppt.c | 501 return smu_cmn_update_table(smu, SMU_TABLE_DPMCLOCKS, 0, smu_table->clocks_table, false); in smu_v13_0_5_set_default_dpm_tables()
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D | aldebaran_ppt.c | 1527 r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true); in aldebaran_i2c_xfer() 1849 ret = smu_cmn_update_table(smu, in aldebaran_get_ecc_info()
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D | yellow_carp_ppt.c | 624 return smu_cmn_update_table(smu, SMU_TABLE_DPMCLOCKS, 0, smu_table->clocks_table, false); in yellow_carp_set_default_dpm_tables()
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D | smu_v13_0.c | 2438 return smu_cmn_update_table(smu, SMU_TABLE_DPMCLOCKS, 0, in smu_v13_0_set_default_dpm_tables()
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/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
D | navi10_ppt.c | 1935 result = smu_cmn_update_table(smu, in navi10_get_power_profile_mode() 2006 ret = smu_cmn_update_table(smu, in navi10_set_power_profile_mode() 2050 ret = smu_cmn_update_table(smu, in navi10_set_power_profile_mode() 2517 ret = smu_cmn_update_table(smu, SMU_TABLE_OVERDRIVE, 0, (void *)boot_od_table, false); in navi10_set_default_od_settings() 2653 ret = smu_cmn_update_table(smu, SMU_TABLE_OVERDRIVE, 0, (void *)od_table, true); in navi10_od_edit_dpm_table() 3016 r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true); in navi10_i2c_xfer() 3474 return smu_cmn_update_table(smu, in navi10_set_config_table()
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D | arcturus_ppt.c | 1417 result = smu_cmn_update_table(smu, in arcturus_get_power_profile_mode() 1486 ret = smu_cmn_update_table(smu, in arcturus_set_power_profile_mode() 1521 ret = smu_cmn_update_table(smu, in arcturus_set_power_profile_mode() 2115 r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true); in arcturus_i2c_xfer()
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D | sienna_cichlid_ppt.c | 1629 result = smu_cmn_update_table(smu, in sienna_cichlid_get_power_profile_mode() 1703 ret = smu_cmn_update_table(smu, in sienna_cichlid_set_power_profile_mode() 1747 ret = smu_cmn_update_table(smu, in sienna_cichlid_set_power_profile_mode() 2156 ret = smu_cmn_update_table(smu, SMU_TABLE_OVERDRIVE, in sienna_cichlid_set_default_od_settings() 2331 ret = smu_cmn_update_table(smu, SMU_TABLE_OVERDRIVE, 0, (void *)od_table, true); in sienna_cichlid_od_edit_dpm_table() 3755 r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true); in sienna_cichlid_i2c_xfer() 4036 ret = smu_cmn_update_table(smu, in sienna_cichlid_get_ecc_info() 4245 return smu_cmn_update_table(smu, in sienna_cichlid_set_config_table()
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D | smu_v11_0.c | 2200 ret = smu_cmn_update_table(smu, SMU_TABLE_OVERDRIVE, 0, (void *)user_od_table, true); in smu_v11_0_restore_user_od_settings()
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D | vangogh_ppt.c | 2069 return smu_cmn_update_table(smu, SMU_TABLE_DPMCLOCKS, 0, smu_table->clocks_table, false); in vangogh_set_default_dpm_tables()
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