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Searched refs:slices (Results 1 – 25 of 40) sorted by relevance

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/linux-6.1.9/block/partitions/
Dsysv68.c51 int i, slices; in sysv68_partition() local
68 slices = be16_to_cpu(b->dk_ios.ios_slccnt); in sysv68_partition()
76 slices -= 1; /* last slice is the whole disk */ in sysv68_partition()
77 snprintf(tmp, sizeof(tmp), "sysV68: %s(s%u)", state->name, slices); in sysv68_partition()
80 for (i = 0; i < slices; i++, slice++) { in sysv68_partition()
/linux-6.1.9/Documentation/devicetree/bindings/timestamp/
Dnvidia,tegra194-hte.yaml17 a bitmap array arranged in 32bit slices where each bit represent signal/line
41 nvidia,slices:
62 - nvidia,slices
74 nvidia,slices = <3>;
84 nvidia,slices = <11>;
/linux-6.1.9/drivers/phy/lantiq/
Dphy-lantiq-vrx200-pcie.c202 static const struct reg_default slices[] = { in ltq_vrx200_pcie_phy_apply_workarounds() local
218 for (i = 0; i < ARRAY_SIZE(slices); i++) { in ltq_vrx200_pcie_phy_apply_workarounds()
220 regmap_update_bits(priv->phy_regmap, slices[i].reg, in ltq_vrx200_pcie_phy_apply_workarounds()
221 slices[i].def, slices[i].def); in ltq_vrx200_pcie_phy_apply_workarounds()
226 regmap_update_bits(priv->phy_regmap, slices[i].reg, in ltq_vrx200_pcie_phy_apply_workarounds()
227 slices[i].def, 0x0); in ltq_vrx200_pcie_phy_apply_workarounds()
/linux-6.1.9/drivers/hte/
Dhte-tegra194.c567 u32 i, slices, val = 0; in tegra_hte_probe() local
575 ret = of_property_read_u32(dev->of_node, "nvidia,slices", &slices); in tegra_hte_probe()
580 nlines = slices << 5; in tegra_hte_probe()
602 hte_dev->sl = devm_kcalloc(dev, slices, sizeof(*hte_dev->sl), in tegra_hte_probe()
653 for (i = 0; i < slices; i++) { in tegra_hte_probe()
667 dev_dbg(gc->dev, "lines: %d, slices:%d", gc->nlines, slices); in tegra_hte_probe()
676 u32 slices = gs->chip->nlines / NV_LINES_IN_SLICE; in tegra_hte_resume_early() local
681 for (i = 0; i < slices; i++) { in tegra_hte_resume_early()
697 u32 slices = gs->chip->nlines / NV_LINES_IN_SLICE; in tegra_hte_suspend_late() local
701 for (i = 0; i < slices; i++) { in tegra_hte_suspend_late()
/linux-6.1.9/Documentation/admin-guide/perf/
Dqcom_l3_pmu.rst6 Centriq SoCs. The L3 cache on these SOCs is composed of multiple slices, shared
9 for aggregating across slices.
/linux-6.1.9/drivers/net/dsa/
Dbcm_sf2_cfp.c29 u8 slices[UDFS_PER_SLICE]; member
44 .slices = {
69 .slices = {
93 .slices = {
149 if (memcmp(slice_layout->slices, zero_slice, in bcm_sf2_get_slice_number()
165 core_writel(priv, layout->udfs[slice_num].slices[i], in bcm_sf2_cfp_udf_set()
410 num_udf = bcm_sf2_get_num_udf_slices(layout->udfs[slice_num].slices); in bcm_sf2_cfp_ipv4_rule_set()
668 num_udf = bcm_sf2_get_num_udf_slices(layout->udfs[slice_num].slices); in bcm_sf2_cfp_ipv6_rule_set()
774 num_udf = bcm_sf2_get_num_udf_slices(layout->udfs[slice_num].slices); in bcm_sf2_cfp_ipv6_rule_set()
/linux-6.1.9/drivers/gpu/drm/i915/display/
Dskl_watermark.c610 if (dbuf_state->slices[pipe] != dbuf_state->slices[for_pipe]) in intel_crtc_dbuf_weights()
646 dbuf_slice_mask = new_dbuf_state->slices[pipe]; in skl_crtc_allocate_ddb()
663 if (old_dbuf_state->slices[pipe] == new_dbuf_state->slices[pipe] && in skl_crtc_allocate_ddb()
686 old_dbuf_state->slices[pipe], new_dbuf_state->slices[pipe], in skl_crtc_allocate_ddb()
2435 enabled_slices |= dbuf_state->slices[pipe]; in intel_dbuf_enabled_slices()
2479 new_dbuf_state->slices[pipe] = in skl_compute_ddb()
2483 if (old_dbuf_state->slices[pipe] == new_dbuf_state->slices[pipe]) in skl_compute_ddb()
2894 u8 slices; in skl_wm_get_hw_state() local
2926 slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes, in skl_wm_get_hw_state()
2928 mbus_offset = mbus_ddb_offset(i915, slices); in skl_wm_get_hw_state()
[all …]
Dskl_watermark.h59 u8 slices[I915_MAX_PIPES]; member
/linux-6.1.9/drivers/gpu/drm/i915/gt/
Dintel_sseu.c666 u8 slices, subslices; in intel_sseu_make_rpcs() local
683 slices = hweight8(req_sseu->slice_mask); in intel_sseu_make_rpcs()
712 slices == 1 && in intel_sseu_make_rpcs()
717 slices *= 2; in intel_sseu_make_rpcs()
727 u32 mask, val = slices; in intel_sseu_make_rpcs()
/linux-6.1.9/drivers/misc/cxl/
Dpci.c1319 CXL_READ_VSEC_NAFUS(dev, vsec, &adapter->slices); in cxl_read_vsec()
1333 adapter->user_irqs = pnv_cxl_get_irq_count(dev) - 1 - 2*adapter->slices; in cxl_read_vsec()
1391 if (!adapter->slices) { in cxl_vsec_looks_ok()
1569 for (slice = 0; slice < adapter->slices; slice++) { in cxl_stop_trace_psl8()
1768 for (slice = 0; slice < adapter->slices; slice++) { in cxl_probe()
1792 for (i = 0; i < adapter->slices; i++) { in cxl_remove()
1853 for (i = 0; i < adapter->slices; i++) { in cxl_pci_error_detected()
1947 for (i = 0; i < adapter->slices; i++) { in cxl_pci_error_detected()
2001 for (i = 0; i < adapter->slices; i++) { in cxl_pci_slot_reset()
2084 for (i = 0; i < adapter->slices; i++) { in cxl_pci_resume()
Dof.c440 for (afu = 0; afu < adapter->slices; afu++) in cxl_of_remove()
485 adapter->slices = 0; in cxl_of_probe()
Dguest.c273 for (i = 0; i < adapter->slices; i++) { in guest_reset()
282 for (i = 0; i < adapter->slices; i++) { in guest_reset()
943 adapter->slices++; in cxl_guest_init_afu()
1117 adapter->slices = 0; in cxl_guest_init_adapter()
Dmain.c89 for (slice = 0; slice < adapter->slices; slice++) { in cxl_slbia_core()
/linux-6.1.9/drivers/gpu/drm/i915/gem/selftests/
Di915_gem_context.c1116 __check_rpcs(const char *name, u32 rpcs, int slices, unsigned int expected, in __check_rpcs() argument
1119 if (slices == expected) in __check_rpcs()
1122 if (slices < 0) { in __check_rpcs()
1124 name, prefix, slices, suffix); in __check_rpcs()
1125 return slices; in __check_rpcs()
1129 name, prefix, slices, expected, suffix); in __check_rpcs()
1132 rpcs, slices, in __check_rpcs()
1148 unsigned int slices = hweight32(ce->engine->sseu.slice_mask); in __sseu_finish() local
1165 ret = __check_rpcs(name, rpcs, ret, slices, "Kernel context", "!"); in __sseu_finish()
/linux-6.1.9/fs/bfs/
DKconfig12 to "UnixWare slices support", below. More information about the BFS
/linux-6.1.9/arch/arm64/kvm/
Dguest.c642 const unsigned int slices = vcpu_sve_slices(vcpu); in num_sve_regs() local
650 return slices * (SVE_NUM_PREGS + SVE_NUM_ZREGS + 1 /* FFR */) in num_sve_regs()
657 const unsigned int slices = vcpu_sve_slices(vcpu); in copy_sve_reg_indices() local
677 for (i = 0; i < slices; i++) { in copy_sve_reg_indices()
/linux-6.1.9/Documentation/devicetree/bindings/arm/msm/
Dqcom,llcc.yaml17 common pool of memory. Cache memory is divided into partitions called slices
/linux-6.1.9/drivers/usb/dwc2/
Dhcd_queue.c557 int slices = DIV_ROUND_UP(qh->device_us, DWC2_US_PER_SLICE); in dwc2_ls_pmap_schedule() local
577 DWC2_LS_SCHEDULE_FRAMES, slices, in dwc2_ls_pmap_schedule()
596 int slices = DIV_ROUND_UP(qh->device_us, DWC2_US_PER_SLICE); in dwc2_ls_pmap_unschedule() local
604 DWC2_LS_SCHEDULE_FRAMES, slices, qh->device_interval, in dwc2_ls_pmap_unschedule()
/linux-6.1.9/Documentation/scheduler/
Dschedutil.rst15 individual tasks to task-group slices to CPU runqueues. As the basis for this
31 Note that blocked tasks still contribute to the aggregates (task-group slices
Dsched-bwc.rst15 slices as threads in the cgroup become runnable. Once all quota has been
169 The fact that cpu-local slices do not expire results in some interesting corner
/linux-6.1.9/Documentation/filesystems/
Dbfs.rst12 know the partition number and the kernel must support UnixWare disk slices
/linux-6.1.9/tools/perf/Documentation/
Dperf-diff.txt142 Select the first and the second 10% time slices to diff:
146 Select from 0% to 10% and 30% to 40% slices to diff:
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_mode_vba_20.c1806 unsigned int slices = mode_lib->vba.NumberOfDSCSlices[k]; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local
1818 slices, in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1832 slices / 2.0, in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4236 mode_lib->vba.slices = 0; in dml20_ModeSupportAndSystemConfigurationFull()
4239 mode_lib->vba.slices = 0; in dml20_ModeSupportAndSystemConfigurationFull()
4241 mode_lib->vba.slices = dml_ceil( in dml20_ModeSupportAndSystemConfigurationFull()
4245 mode_lib->vba.slices = 8.0; in dml20_ModeSupportAndSystemConfigurationFull()
4247 mode_lib->vba.slices = 4.0; in dml20_ModeSupportAndSystemConfigurationFull()
4249 mode_lib->vba.slices = 2.0; in dml20_ModeSupportAndSystemConfigurationFull()
4251 mode_lib->vba.slices = 1.0; in dml20_ModeSupportAndSystemConfigurationFull()
[all …]
Ddisplay_mode_vba_20v2.c1842 unsigned int slices = mode_lib->vba.NumberOfDSCSlices[k]; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local
1854 slices, in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1868 slices / 2.0, in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4357 mode_lib->vba.slices = 0; in dml20v2_ModeSupportAndSystemConfigurationFull()
4360 mode_lib->vba.slices = 0; in dml20v2_ModeSupportAndSystemConfigurationFull()
4362 mode_lib->vba.slices = dml_ceil( in dml20v2_ModeSupportAndSystemConfigurationFull()
4366 mode_lib->vba.slices = 8.0; in dml20v2_ModeSupportAndSystemConfigurationFull()
4368 mode_lib->vba.slices = 4.0; in dml20v2_ModeSupportAndSystemConfigurationFull()
4370 mode_lib->vba.slices = 2.0; in dml20v2_ModeSupportAndSystemConfigurationFull()
4372 mode_lib->vba.slices = 1.0; in dml20v2_ModeSupportAndSystemConfigurationFull()
[all …]
/linux-6.1.9/Documentation/userspace-api/media/v4l/
Dext-ctrls-codec-stateless.rst742 control shall be set. When multiple slices compose a frame,
748 The OUTPUT buffer must contain all slices needed to decode the
783 - Selecting this value specifies that H264 slices are passed
789 - Selecting this value specifies that H264 slices are expected
2557 When multiple slices are submitted in a request, the length of
2559 slices in the request.
2801 The OUTPUT buffer must contain all slices needed to decode the
2828 - Selecting this value specifies that HEVC slices are passed
2834 - Selecting this value specifies that HEVC slices are expected

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