Searched refs:sink_rates (Results 1 – 6 of 6) sorted by relevance
/linux-6.1.9/drivers/gpu/drm/nouveau/ |
D | nouveau_dp.c | 163 u8 sink_rates[16]; in nouveau_dp_detect() local 165 ret = drm_dp_dpcd_read(aux, DP_SUPPORTED_LINK_RATES, sink_rates, sizeof(sink_rates)); in nouveau_dp_detect() 166 if (ret == sizeof(sink_rates)) { in nouveau_dp_detect() 167 for (i = 0; i < ARRAY_SIZE(sink_rates); i += 2) { in nouveau_dp_detect() 168 int val = ((sink_rates[i + 1] << 8) | sink_rates[i]) * 200 / 10; in nouveau_dp_detect()
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/linux-6.1.9/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
D | dp.c | 559 u8 sink_rates[DPCD_RC10_SUPPORTED_LINK_RATES__SIZE]; in nvkm_dp_enable_supported_link_rates() local 565 sink_rates, sizeof(sink_rates))) in nvkm_dp_enable_supported_link_rates() 568 for (i = 0; i < ARRAY_SIZE(sink_rates); i += 2) { in nvkm_dp_enable_supported_link_rates() 569 const u32 rate = ((sink_rates[i + 1] << 8) | sink_rates[i]) * 200 / 10; in nvkm_dp_enable_supported_link_rates()
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/linux-6.1.9/drivers/gpu/drm/bridge/ |
D | ti-sn65dsi86.c | 863 __le16 sink_rates[DP_MAX_SUPPORTED_RATES]; in ti_sn_bridge_read_valid_rates() local 866 sink_rates, sizeof(sink_rates)); in ti_sn_bridge_read_valid_rates() 868 if (ret != sizeof(sink_rates)) { in ti_sn_bridge_read_valid_rates() 873 memset(sink_rates, 0, sizeof(sink_rates)); in ti_sn_bridge_read_valid_rates() 876 for (i = 0; i < ARRAY_SIZE(sink_rates); i++) { in ti_sn_bridge_read_valid_rates() 877 rate_per_200khz = le16_to_cpu(sink_rates[i]); in ti_sn_bridge_read_valid_rates()
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/linux-6.1.9/drivers/gpu/drm/i915/display/ |
D | intel_dp.c | 129 intel_dp->sink_rates[0] = 162000; in intel_dp_set_default_sink_rates() 146 memcpy(intel_dp->sink_rates, quirk_rates, sizeof(quirk_rates)); in intel_dp_set_dpcd_sink_rates() 163 intel_dp->sink_rates[i] = dp_rates[i]; in intel_dp_set_dpcd_sink_rates() 173 BUILD_BUG_ON(ARRAY_SIZE(intel_dp->sink_rates) < ARRAY_SIZE(dp_rates) + 3); in intel_dp_set_dpcd_sink_rates() 194 intel_dp->sink_rates[i++] = 1000000; in intel_dp_set_dpcd_sink_rates() 196 intel_dp->sink_rates[i++] = 1350000; in intel_dp_set_dpcd_sink_rates() 198 intel_dp->sink_rates[i++] = 2000000; in intel_dp_set_dpcd_sink_rates() 513 const int *sink_rates, int sink_len, in intersect_rates() argument 519 if (source_rates[i] == sink_rates[j]) { in intersect_rates() 526 } else if (source_rates[i] < sink_rates[j]) { in intersect_rates() [all …]
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D | intel_dp_link_training.c | 672 __le16 sink_rates[DP_MAX_SUPPORTED_RATES]; in intel_dp_prepare_link_train() local 678 sink_rates, sizeof(sink_rates)); in intel_dp_prepare_link_train()
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D | intel_display_types.h | 1643 int sink_rates[DP_MAX_SUPPORTED_RATES]; member
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