Searched refs:shared_dpll (Results 1 – 10 of 10) sorted by relevance
112 struct intel_shared_dpll_state *shared_dpll) in intel_atomic_duplicate_dpll_state() argument120 shared_dpll[i] = pll->state; in intel_atomic_duplicate_dpll_state()135 state->shared_dpll); in intel_atomic_get_shared_dpll_state()138 return state->shared_dpll; in intel_atomic_get_shared_dpll_state()242 struct intel_shared_dpll *pll = crtc_state->shared_dpll; in intel_enable_shared_dpll()288 struct intel_shared_dpll *pll = crtc_state->shared_dpll; in intel_disable_shared_dpll()332 struct intel_shared_dpll_state *shared_dpll; in intel_find_shared_dpll() local335 shared_dpll = intel_atomic_get_shared_dpll_state(&state->base); in intel_find_shared_dpll()343 if (shared_dpll[i].pipe_mask == 0) { in intel_find_shared_dpll()350 &shared_dpll[i].hw_state, in intel_find_shared_dpll()[all …]
246 assert_shared_dpll_enabled(dev_priv, crtc_state->shared_dpll); in ilk_enable_pch_transcoder()382 if (crtc_state->shared_dpll == in ilk_pch_enable()532 crtc_state->shared_dpll = intel_get_shared_dpll_by_id(dev_priv, pll_id); in ilk_pch_get_config()533 pll = crtc_state->shared_dpll; in ilk_pch_get_config()
225 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_pll_to_ddi_clk_sel()1449 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in adls_ddi_enable_clock()1493 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in rkl_ddi_enable_clock()1537 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in dg1_ddi_enable_clock()1603 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_ddi_combo_enable_clock()1647 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in jsl_ddi_tc_enable_clock()1690 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_ddi_tc_enable_clock()1798 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in skl_ddi_enable_clock()1866 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in hsw_ddi_enable_clock()3474 crtc_state->port_clock = intel_dpll_get_freq(i915, crtc_state->shared_dpll, in intel_ddi_get_clock()[all …]
646 struct intel_shared_dpll_state shared_dpll[I915_NUM_PLLS]; member1105 struct intel_shared_dpll *shared_dpll; member
1499 new_crtc_state->shared_dpll = old_crtc_state->shared_dpll; in intel_encoders_update_prepare()1868 if (crtc_state->shared_dpll) in icl_ddi_bigjoiner_pre_enable()1918 if (new_crtc_state->shared_dpll) in hsw_crtc_enable()2204 if (crtc_state->shared_dpll) in get_crtc_power_domains()3237 pipe_config->shared_dpll = NULL; in i9xx_get_pipe_config()3658 pipe_config->shared_dpll = NULL; in ilk_get_pipe_config()4056 pipe_config->shared_dpll = NULL; in hsw_get_pipe_config()5135 saved_state->shared_dpll = slave_crtc_state->shared_dpll; in copy_bigjoiner_crtc_state_modeset()5190 saved_state->shared_dpll = crtc_state->shared_dpll; in intel_crtc_prepare_cleared_state()5835 PIPE_CONF_CHECK_P(shared_dpll); in intel_pipe_config_compare()
302 crtc_state->shared_dpll && in has_bogus_dpll_config()
242 pipe_config->shared_dpll); in intel_pre_enable_lvds()
1497 drm_WARN_ON(&i915->drm, !crtc_state->hw.enable && crtc_state->shared_dpll); in intel_dpll_crtc_get_shared_dpll()1499 if (!crtc_state->hw.enable || crtc_state->shared_dpll) in intel_dpll_crtc_get_shared_dpll()
804 drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL); in hsw_fdi_link_train()
693 struct intel_shared_dpll *pll = crtc_state->shared_dpll; in gen11_dsi_map_pll()