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Searched refs:set_min_deep_sleep_dcfclk (Results 1 – 4 of 4) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
Drv1_clk_mgr.c266 pp_smu->set_min_deep_sleep_dcfclk) { in rv1_update_clocks()
269 …pp_smu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_deep_sleep_k… in rv1_update_clocks()
286 pp_smu->set_min_deep_sleep_dcfclk) { in rv1_update_clocks()
289 …pp_smu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_deep_sleep_k… in rv1_update_clocks()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/
Ddm_pp_smu.h124 void (*set_min_deep_sleep_dcfclk)(struct pp_smu *pp, int mhz); member
184 enum pp_smu_status (*set_min_deep_sleep_dcfclk)(struct pp_smu *pp, int Mhz); member
/linux-6.1.9/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_pp_smu.c765 funcs->rv_funcs.set_min_deep_sleep_dcfclk = in dm_pp_get_funcs()
778 funcs->nv_funcs.set_min_deep_sleep_dcfclk = in dm_pp_get_funcs()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.c271 if (pp_smu && pp_smu->set_min_deep_sleep_dcfclk) in dcn2_update_clocks()
272 …pp_smu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_deep_… in dcn2_update_clocks()